Document
TDA10025HN
Dual cable demodulator
Rev. 1 — 22 August 2011
Product short data sheet
1. General description
The TDA10025HN is a Dual Cable Downstream Processor.
The Cable Downstream Processor (CDP) implements the physical interfaces and protocols required to provide the highest quality services of an in-band DOCSIS, EuroDOCSIS, DVB and OpenCable Set-Top Box (STB). The downstream signals are digitized by 12-bit ADC and passed to the Demod and Forward Error Correction (FEC) blocks, which do all the cable physical layer processing. This processing includes demodulating and Annex A (Europe), Annex B (US) or Annex C (Japan) FEC for the in-band data.
2. Features and benefits
QPSK, 16 QAM, 32 QAM, 64 QAM, 128 QAM and 256 QAM Demodulator ITU-T J83 Annex A, B and C FEC Transport Stream Multiplex Frame (TSMF) module for Annex C compliance Time interleaved parallel mode or serial mode for Transport Stream (TS) interface On chip PLL for crystal frequency multiplication (16 MHz external) Reuse of the tuner clock, saving one crystal Embedded 12-bit ADC 3.3 V and 1.2 V power supplies Low power < 235 mW for dual stream operation Small size package Low cost Bill Of Material (BOM)
NXP Semiconductors
TDA10025HN
Dual cable demodulator
3. Quick reference data
Table 1. Symbol P
Ptot VDD(1V2) VDD(3V3) VIH
Quick reference data
Parameter
Conditions
power dissipation
Standby mode:
all 3 ADC in Power-down mode and all clocks disabled
operation mode:
1.2 V supply voltage; 2 simultaneous DVB-C demodulations (256 QAM 6.9 Msps)
3.3 V supply voltage; 2 simultaneous DVB-C demodulations (256 QAM 6.9 Msps)
total power dissipation
2 simultaneous DVB-C demodulations (256 QAM 6.9 Msps)
supply voltage (1.2 V)
supply voltage (3.3 V)
HIGH-level input voltage VDD(3V3) related input levels
VIL
LOW-level input voltage
[1] Tamb = 25 C, VDD(1V2) and VDD(3V3) typical. [2] Tj = 120 C, VDD(1V2) and VDD(3V3) maximum.
4. Ordering information
Min
Typ
Max
-
10[1]
30[2]
Unit mW
-
205[1]
280[2]
mW
-
30[1]
50[2]
mW
-
235[1]
330[2]
mW
1.15
1.2
3.0
3.3
2.0
-
0.5
-
1.3
V
3.6
V
VDD(3V3) + V 0.5
+0.8
V
Table 2. Ordering information
Type number Package
Name
Description
Version
TDA10025HN/C1 HVQFN48 plastic thermal enhanced very thin quad flat package; SOT619-1 no leads; 48 terminals; body 7 7 0.85 mm
TDA10025HN_SDS
Product short data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 August 2011
© NXP B.V. 2011. All rights reserved.
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NXP Semiconductors
5. Block diag.