Document
SN54HCT08, SN74HCT08
SCLS063F – NOVEMBER 1988 – REVISED OCTOBER 2022
SNx4HCT08 Quadruple 2-Input Positive-AND Gates
1 Features
• Operating voltage range of 4.5 V to 5.5 V • Outputs can drive up to 10 LSTTL loads • Low power consumption, 20-µA max ICC • Typical tpd = 13 ns • ±4-mA output drive at 5 V • Low input current of 1 µA max • Inputs are TTL-Voltage compatible
xA
2 Description
These devices contain four independent 2-input AND gates. They perform the Boolean function Y = A • B in positive logic.
PART NUMBER SN74HCT08D SN74HCT08DB SN74HCT08N SN74HCT08NS SN74HCT08PW
Device Information
PACKAGE(1) BODY SIZE (NOM)
SOIC (14)
8.65 mm × 3.90 mm
SSOP (14)
6.20 mm × 5.30 mm
PDIP (14)
19.31 mm × 6.35 mm
SO (14)
10.20 mm × 5.30 mm
TSSOP (14) 5.00 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
xY
xB
Functional Block Diagram
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN54HCT08, SN74HCT08
SCLS063F – NOVEMBER 1988 – REVISED OCTOBER 2022
www.ti.com
Table of Contents
1 Features............................................................................1 2 Description.......................................................................1 3 Revision History.............................................................. 2 4 Pin Configuration and Functions...................................3 5 Specifications.................................................................. 4
5.1 Absolute Maximum Ratings........................................ 4 5.2 Recommended Operating Conditions(1) ..................... 4 5.3 Thermal Information....................................................4 5.4 Electrical Characteristics.............................................5 5.5 Switching Characteristics ...........................................5 5.6 Operating Characteristics........................................... 5 6 Parameter Measurement Information............................ 6 7 Detailed Description........................................................7 7.1 Overview..................................................................... 7 7.2 Functional Block Diagram........................................... 7
7.3 Device Functional Modes............................................7 8 Power Supply Recommendations..................................8 9 Layout...............................................................................8
9.1 Layout Guidelines....................................................... 8 9.2 Layout Example.......................................................... 8 10 Device and Documentation Support............................9 10.1 Documentation Support............................................ 9 10.2 Receiving Notification of Documentation Updates....9 10.3 Support Resources................................................... 9 10.4 Trademarks............................................................... 9 10.5 Electrostatic Discharge Caution................................9 10.6 Glossary....................................................................9 11 Mechanical, Packaging, and Orderable Information...................................................................... 9
3 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision E (February 2022) to Revision F (October 2022)
Page
• Increased RθJA for packages: D (86 to 138.7); DB (96 to 114.8); N (80 to 67); NS (76 to 93.3); PW (113 to 159.8)..................................................................................................................................................................4
Changes from Revision D (August 2003) to Revision E (February 2022)
Page
• Updated the numbering, formatting, tables, figures, and cross-references throughout the doucment to reflect modern data sheet standards............................................................................................................................. 1
2
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4 Pin Configuration and Functions
1A
1
1B
2
1Y
3
2A
4
2B
5
2Y
6
GND
7
14
VCC
13
4B
12
4A
11
4Y
10
3B
9
3A
8
3Y
D, DB, J, N, NS, PW or W Package 14-Pin SOIC, SSOP, PDIP, SO or TSSOP
Top View
SN54HCT08, SN74HCT08
SCLS063F – NOVEMBER 1988 – REVISED OCTOBER 2022
FK Package 20-Pin LCCC
Top View
Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: SN54HCT08 SN74HCT08
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3
SN54HCT08, SN74HCT08
SCLS063F – NOVEMBER 1988 – REVISED OCTOBER 2022
www.ti.com
5 Specifications
5.1 Absolute Maximum Ratings
over operating free-air temperature range (unless o.