OCTAL BUFFERS AND LINE DRIVER
SN54HCT240, SN74HCT240
SCLS174G – MARCH 1984 – REVISED MAY 2022
SNx4HCT240 Octal Buffers and Line Drivers With 3-State O...
Description
SN54HCT240, SN74HCT240
SCLS174G – MARCH 1984 – REVISED MAY 2022
SNx4HCT240 Octal Buffers and Line Drivers With 3-State Outputs
1 Features
Operating voltage range of 4.5 V to 5.5 V High-current outputs drive up to 15 LSTTL loads Low power consumption, 80-μA max ICC Typical tpd = 12 ns ±6-mA output drive at 5 V Low input current of 1 μA max Inputs are TTL-voltage compatible 3-state outputs drive bus lines or buffer memory
address registers
2 Description
These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HCT240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.
PART NUMBER
Device Information
PACKAGE(1) BODY SIZE (NOM)
SN74HCT240DW SOIC (20)
12.80 mm × 7.50 mm
SN74HCT240N
PDIP (20)
25.40 mm × 6.35 mm
SN74HCT240NSR SO (20)
15.00 mm × 5.30 mm
SN74HCT240PW TSSOP (20) 6.50 mm × 4.40 mm
SN54HCT240J
CDIP (20)
26.92 mm × 6.92 mm
SNJ54HCT240FK LCCC (20)
8.89 mm × 8.45 mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
Functional Block Diagram
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, inte...
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