DS26LV32AQML

DS26LV32AQML www.ti.com SNOSAS7A – MARCH 2006 – REVISED APRIL 2013 DS26LV32AQML 3V Enhanced CMOS Quad Differential Line Receiver Check for Samples: DS26LV32AQML FEATURES 1 2 Comparable to Both TIA/EIA-422 and ITU-T V.11 Standards Low Power CMOS Design (30 mW typical) Interoperable with Existing 5V RS-422 Networks Receiver OPEN Input Failsafe Feature Pin Compatible with DS26C32AT DESCRIPTION The DS26LV32A is a high speed quad differential CMOS receiver that is comparable to TIA/EIA-422-B and ITU-T V.11 standards, but with a specified common mode voltage range of -0.5V to +5.5V due to the lower operating supply voltage of 3.0V to 3.6V. The TRI-STATE enables, EN and EN, allow the device to be active High or active Low. The enables are common to all four receivers. The receiver output (RO) is specified to be High when the inputs are left open. The receiver can detect signals as low as ±200mV over the common mode range of -0.5V to +5.5V. The receiver outputs (RO) are compatible with TTL and LVCMOS levels. Connection Diagram Figure 1. CLGA Package- Top View See Package Number NAD0016A 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. 2 PRODUCTION DATA information is current as of publication date. Products conform to specifications...