33904

NXP Semiconductors Data Sheet: Advance Information SBC Gen2 with CAN high speed and LIN interface Document Number: MC33903_4_5 Rev. 14.0, 2/2018 333990033/4//5 The 33903/4/5 is the second generation family of the System Basis Chip (SBC). It combines several features and enhances present module designs. The device works as an advanced power management unit for the MCU with additional integrated circuits such as sensors and CAN transceivers. It has a built-in enhanced high-speed CAN interface (ISO11898-2 and -5) with local and bus failure diagnostics, protection, and fail-safe operation modes. The SBC may include zero, one or two LIN 2.1 interfaces with LIN output pin switches. It includes up to four wake-up input pins that can also be configured as output drivers for flexibility. This device is powered by SMARTMOS technology. This device implements multiple Low-power (LP) modes, with very low-current consumption. In addition, the device is part of a family concept where pin compatibility adds versatility to module design. The 33903/4/5 also implements an innovative and advanced fail-safe state machine and concept solution. SYSTEM BASIS CHIP EK Suffix (Pb-free) 98ASA10556D 32-PIN SOIC EK Suffix (Pb-free) 98ASA10506D 54-PIN SOIC Features Applications Voltage regulator for MCU, 5.0 or 3.3 V, part number selectable, with possibility of usage external PNP to extend current capability and share power dissipation Voltage, current, and temperature protection Extremely lo...