Channel Retimer. DS100DF410 Datasheet

DS100DF410 Retimer. Datasheet pdf. Equivalent

Part DS100DF410
Description Low Power 10GbE Quad Channel Retimer
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DS100DF410
Product
Folder
Sample &
Buy
Technical
Documents
Tools &
Software
Support &
Community
DS100DF410
SNLS399B – JANUARY 2012 – REVISED JANUARY 2015
DS100DF410 Low Power 10GbE Quad Channel Retimer
1 Features
1 Each Channel Independently Locks to 10.3125
Gbps
• Lock Operation (typically under 15 ms)
• Low Latency (~300 ps)
• Adaptive Equalization up to 34 dB Boost at 5 GHz
• Adjustable Transmit VOD: 600 to 1300 mVp-p
• Adjustable Transmit De-emphasis to –12 dB
• Typical Power Dissipation (EQ+DFE+CDR+DE):
180 mW/channel
• Programmable Output Polarity Inversion
• Input Signal Detection, CDR Lock
Detection/Indicator
• On-chip Eye Monitor (EOM), PRBS Generator
• Single 2.5 V ±5% Power Supply
• SMBus/EEPROM Configuration Modes
• Operating Temperature Range of –40°C to 85°C
• WQFN 48-Pin, 7 mm x 7 mm Package
• Easy Pin Compatible Upgrade Between Repeater
and Retimers
– DS100RT410 (EQ+CDR+DE): 10.3125 Gbps
– DS100DF410 (EQ+DFE+CDR+DE): 10.3125
Gbps
– DS110RT410 (EQ+CDR+DE): 8.5–11.3 Gbps
– DS110DF410 (EQ+DFE+CDR+DE): 8.5–11.3
Gbps
– DS125RT410 (EQ+CDR+DE): 9.8–12.5 Gbps
– DS125DF410 (EQ+DFE+CDR+DE): 9.8–12.5
Gbps
– DS100BR410 (EQ+DE): Up to 10.3125 Gbps
2 Applications
• Front Port SFF 8431 (SFP+) Optical and Direct
Attach Copper
• Backplane Reach Extension, Data Retimer
• Ethernet: 10GbE, 1GbE
For other data rates and data transmission
protocols, other pin-compatible devices in the
retimer family can be used.
3 Description
The DS100DF410 is four channel retimers with
integrated signal conditioning. Each channel can
independently lock to 10.3125 Gbps data rate to
support 10GbE. The device includes a fully adaptive
Continuous-Time Linear Equalizer (CTLE), Clock and
Data Recovery (CDR) and transmit De-Emphasis
(DE) driver. The DS100DF410 also includes a self
calibrating 5-tap Decision Feedback Equalizer (DFE)
to enable data transmission over long, lossy and
crosstalk-impaired highspeed serial links to achieve
BER < 1×10-15.
The programmable settings can be applied easily
using the SMBus (I2C) interface, or they can be
loaded via an external EEPROM. An on-chip eye
monitor and a PRBS generator allow real-time
measurement of high-speed serial data for system
bring-up or field tuning. Flow-through pinout and
single power supply make the DS100DF410 easy to
use.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
DS100DF410SQ WQFN (48)
7.00 mm × 7.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Application Diagram
Switch Fabric
Line Card
DS100DF410
Optical Modules
x4
ASIC
x4
x4
ASIC
10GbE
SFP+(SFF8431)
QSFP
10GbE
Back
Plane/
Mid
Plane
x4
DS100DF410
Passive Copper
Clean Signal
Noisy Signal
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.



DS100DF410
DS100DF410
SNLS399B – JANUARY 2012 – REVISED JANUARY 2015
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 5
6.1 Absolute Maximum Ratings ..................................... 5
6.2 ESD Ratings.............................................................. 5
6.3 Recommended Operating Conditions ...................... 5
6.4 Thermal Information .................................................. 5
6.5 Electrical Characteristics........................................... 6
6.6 Typical Characteristics .............................................. 8
7 Detailed Description .............................................. 9
7.1 Overview ................................................................... 9
7.2 Functional Block Diagram ......................................... 9
7.3 Feature Description................................................... 9
7.4 Device Functional Modes........................................ 13
7.5 Programming........................................................... 17
7.6 Register Maps ......................................................... 30
8 Application and Implementation ........................ 47
8.1 Application Information............................................ 47
8.2 Typical Application .................................................. 47
9 Power Supply Recommendations...................... 49
10 Layout................................................................... 49
10.1 Layout Guidelines ................................................. 49
10.2 Layout Example .................................................... 49
11 Device and Documentation Support ................. 51
11.1 Trademarks ........................................................... 51
11.2 Electrostatic Discharge Caution ............................ 51
11.3 Glossary ................................................................ 51
12 Mechanical, Packaging, and Orderable
Information ........................................................... 51
4 Revision History
Changes from Revision A (February 2013) to Revision B
Page
• Changed ESD Ratings table, Feature Description section, Device Functional Modes, Application and
Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation
Support section, and Mechanical, Packaging, and Orderable Information section................................................................ 1
2
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