A/D Converter. ADC08B3000 Datasheet

ADC08B3000 Converter. Datasheet pdf. Equivalent

Part ADC08B3000
Description Low Power A/D Converter
Feature ADC08B3000 www.ti.com SNAS331M – JUNE 2006 – REVISED APRIL 2013 ADC08B3000 8-Bit, 3 GSPS, High Pe.
Manufacture etcTI
Datasheet
Download ADC08B3000 Datasheet




ADC08B3000
ADC08B3000
www.ti.com
SNAS331M – JUNE 2006 – REVISED APRIL 2013
ADC08B3000 8-Bit, 3 GSPS, High Performance, Low Power A/D Converter with 4K Buffer
Check for Samples: ADC08B3000
FEATURES
1
2 Single +1.9V ±0.1V Operation
• Choice of SDR or DDR Output Clocking
• Internal selectable 4K Data Buffer
• Serial Interface for Extended Control
• Adjustment of Input Full-Scale Range, Offset
and Clock Phase
• Duty Cycle Corrected Sample Clock
• Test Pattern Output Capability
APPLICATIONS
• Distance Ranging
• Test and Measurement
KEY SPECIFICATIONS
• Resolution: 8 Bits
• Max Conversion Rate: 3 Gsps (min)
• Code Error Rate: 10-18 (typ)
• ENOB @ 748 MHz Input: 7.1 Bits (typ)
• SNR @ 748 MHz: 44.9 dB (typ)
• Full Power Bandwidth: 3 GHz (typ)
• Power Consumption
– Full Power Capure: 1.6 W (typ)
– Power Down Mode: 25 mW (typ)
DESCRIPTION
The ADC08B3000 is a single, low power, high
performance CMOS analog-to-digital converter that
digitizes signals to 8 bits resolution at sample rates
up to 3.4 Gigasamples Per Second, (Gsps).
Consuming a typical 1.6 Watts at 3 Gsps from a
single 1.9 Volt supply, this device is ensured to have
no missing codes over the full operating temperature
range. The unique folding and interpolating
architecture, the fully differential comparator design,
the innovative design of the internal sample-and-hold
amplifier and the calibration scheme enable an
excellent response of all dynamic parameters up to
Nyquist, producing a high 7.1 Effective Number Of
Bits, (ENOB), with a 748 MHz input signal and a 3
GHz sample rate while providing a 10-18 Code Error
Rate. A sample rate of 3 Gsps is achieved by
interleaving two ADCs, each operating at 1.5 Gsps.
Output formatting is offset binary. The device
contains a 4K Capture Buffer with output on two 8-bit
Low Voltage CMOS (LVCMOS) output buses at rates
up to 200MHz.
The converter typically consumes less than 25 mW in
the Power Down Mode and is available in a 128-lead,
thermally enhanced exposed pad HLQFP and
operates over the Industrial (-40°C TA +85°C)
temperature range.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006–2013, Texas Instruments Incorporated



ADC08B3000
ADC08B3000
SNAS331M – JUNE 2006 – REVISED APRIL 2013
Block Diagram
www.ti.com
VIN+
VIN-
VBG
CLK+
CLK-
Control
Inputs
Serial
Interface
+
S/H
-
+
S/H
-
VREF
8-BIT
ADC
8-BIT
ADC
RESET
OR
4k Data
Capture
Buffer
8 bit D1 CMOS Data
DRDY1
8 bit D2 CMOS Data
DRDY2
RCLK
2
ADC
Control
Logic
3
PD CAL ADCCLK_RST
CLK/2
CalRun
Capture Buffer
Control
Logic
WEN REN EF FF WENSYNC
2
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Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: ADC08B3000







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