D/A Converter. DAC8560 Datasheet

DAC8560 Converter. Datasheet pdf. Equivalent

Part DAC8560
Description D/A Converter
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DAC8560
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Technical
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Design
DAC8560
SLAS464C – DECEMBER 2006 – REVISED JANUARY 2018
DAC8560 16-Bit, Ultra-Low Glitch, Voltage Output Digital-to-Analog Converter
With 2.5-V, 2-ppm/°C Internal Reference
1 Features
1 Relative Accuracy: 4 LSB
• Glitch Energy: 0.15 nV-s
MicroPower Operation: 510 μA at 2.7 V
• Internal Reference:
– 2.5-V Reference Voltage (Enabled by Default)
– 0.02% Initial Accuracy
– 2-ppm/°C Temperature Drift (Typical)
– 5-ppm/°C Temperature Drift (Maximum)
– 20-mA Sink/Source Capability
• Power-On Reset to Zero
• Power Supply: 2.7 V to 5.5 V
• 16-Bit Monotonic Over Temperature Range
• Settling Time: 10 μs to ±0.003% FSR
• Low-Power Serial Interface With Schmitt-
Triggered Inputs
• On-Chip Output Buffer Amplifier With Rail-to-Rail
Operation
• Power-Down Capability
• Drop-In Compatible With DAC8531/01 and
DAC8550 /51
• Temperature Range: –40°C to +105°C
• Available in a Tiny 8-Pin VSSOP Package
2 Applications
• Process Control
• Data Acquisition Systems
• Closed-Loop Servo-Control
• PC Peripherals
• Portable Instrumentation
3 Description
The DAC8560 is a low-power, voltage output, 16-bit
digital-to-analog converter (DAC). The DAC8560
includes a 2.5-V, 2-ppm/°C internal reference
(enabled by default), giving a full-scale output voltage
range of 0 V to 2.5 V. The internal reference has an
initial accuracy of 0.02% and can source up to 20 mA
at the VREF pin. The device is monotonic, provides
very good linearity, and minimizes undesired code-to-
code transient voltages (glitch). The DAC8560 uses a
versatile 3-wire serial interface that operates at clock
rates up to 30 MHz. It is compatible with standard
SPI, QSPI, Microwire, and digital-signal-processor
(DSP) interfaces.
The DAC8560 incorporates a power-on-reset (POR)
circuit that ensures the DAC output powers up at zero
scale and remains there until a valid code is written to
the device. The DAC8560 contains a power-down
feature, accessed over the serial interface, that
reduces the current consumption of the device to
1.2 μA at 5 V.
The low-power consumption, internal reference, and
small footprint make this device ideal for portable,
battery-operated equipment. The power consumption
is 2.6 mW at 5 V, reducing to 6 μW in power-down
mode.
The DAC8560 is available in an 8-pin VSSOP
package.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
DAC8560
VSSOP (8)
3.00 mm × 3.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Functional Block Diagram
VDD
VFB
VREF
2.5V
Reference
Ref (+)
16-Bit DAC
16
VOUT
DAC Register
SYNC
SCLK
DIN
16
Shift Register
PWD
Control
Resistor
Network
GND
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.



DAC8560
DAC8560
SLAS464C – DECEMBER 2006 – REVISED JANUARY 2018
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ..................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information .................................................. 4
6.5 Electrical Characteristics........................................... 5
6.6 Timing Requirements ................................................ 7
6.7 Typical Characteristics: Internal Reference .............. 8
6.8 Typical Characteristics: DAC at VDD = 5 V ............. 10
6.9 Typical Characteristics: DAC at VDD = 3.6 V .......... 15
6.10 Typical Characteristics: DAC at VDD = 2.7 V ........ 15
7 Detailed Description ............................................ 19
7.1 Overview ................................................................. 19
7.2 Functional Block Diagram ....................................... 19
7.3 Feature Description................................................. 19
7.4 Device Functional Modes........................................ 24
7.5 Programming........................................................... 25
7.6 Register Maps ......................................................... 26
8 Application and Implementation ........................ 27
8.1 Application Information............................................ 27
8.2 Typical Applications ................................................ 27
9 Power Supply Recommendations...................... 32
10 Layout................................................................... 32
10.1 Layout Guidelines ................................................. 32
10.2 Layout Example .................................................... 32
11 Device and Documentation Support ................. 33
11.1 Documentation Support ........................................ 33
11.2 Receiving Notification of Documentation Updates 33
11.3 Community Resource............................................ 33
11.4 Trademarks ........................................................... 33
11.5 Electrostatic Discharge Caution ............................ 33
11.6 Glossary ................................................................ 33
12 Mechanical, Packaging, and Orderable
Information ........................................................... 33
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (November 2011) to Revision C
Page
• Added topnav link for TI Designs, Device Information, ESD Ratings, Recommended Operating Conditions, and
Thermal Information tables, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section ................................................................................................. 1
Changes from Revision A (November 2011) to Revision B
Page
• Changed Revision date from A, May 2011 to B, November 2011 ......................................................................................... 1
• Changed "Zero-code error drift" in the ELEC CHARA table, TYP from ±20 to ±4 ................................................................. 5
Changes from Original (December 2006) to Revision A
Page
• Changed Output Voltage parameter min/max values from 2.4995 and 2.5005 to 2.4975 and 2.5025, respectively............. 6
• Changed Initial Accuracy parameter min/max values from –0.02 and 0.02 to –0.1 and 0.1, respectively ............................ 6
Changes from Revision A (May 2011) to Revision B
Page
• Changed Revision date from A, May 2011 to B, November 2011 ......................................................................................... 1
• Changed "Zero-code error drift" in the ELEC CHARA table, TYP from ±20 to ±4 ................................................................. 5
2
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