Quadruple 2-Input Positive-NOR Gates
SN54ALS02A, SN54AS02, SN74ALS02A, SN74AS02 QUADRUPLE 2ĆINPUT POSITIVEĆNOR GATES ą
SDAS111B − APRIL 1982 − REVISED DECEMB...
Description
SN54ALS02A, SN54AS02, SN74ALS02A, SN74AS02 QUADRUPLE 2ĆINPUT POSITIVEĆNOR GATES ą
SDAS111B − APRIL 1982 − REVISED DECEMBER 1994
Package Options Include Plastic
Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs
description
These devices contain four independent 2-input positive-NOR gates. They perform the Boolean functions Y = A + B or Y = A B in positive logic.
The SN54ALS02A and SN54AS02 are characterized for operation over the full military temperature range of − 55°C to 125°C. The SN74ALS02A and SN74AS02 are characterized for operation from 0°C to 70°C.
SN54ALS02A, SN54AS02 . . . J PACKAGE SN74ALS02A, SN74AS02 . . . D OR N PACKAGE
(TOP VIEW)
1Y 1 1A 2 1B 3 2Y 4 2A 5 2B 6 GND 7
14 VCC 13 4Y 12 4B 11 4A 10 3Y 9 3B 8 3A
SN54ALS02A, SN54AS02 . . . FK PACKAGE (TOP VIEW)
4Y
VCC
NC
1Y
1A
FUNCTION TABLE (each gate)
INPUTS
A
B
OUTPUT Y
H
X
L
X
H
L
L
L
H
1B
3 2 1 20 19
4
18
4B
NC 5
17 NC
2Y 6
16 4A
NC 7
15 NC
2A 8
14 3Y
9 10 11 12 13
3B
3A
NC
GND
2B
logic symbol†
2
1A
≥1
1
3
1Y
1B
5
2A
4
6
2Y
2B
8
3A
10
9
3Y
3B
11
4A
13
12
4Y
4B
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
NC − No internal connection
logic diagram (positive logic)
2 1A
3 1B
5 2A
6 2B
8 3A
9 3B
11 4A
12 4B
1 1Y
4 2Y
10 3Y
13 4Y
PRODUCTION DATA information is current as of publication date. P...
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