AD6402

a FEATURES On-Chip Regulator PLL Demodulator On-Chip VCO No Trims Excellent Sensitivity 28-Lead SSOP Package APPLICATIONS DECT/PWT/WLAN TDMA FM/FSK Systems IFIN IF Transceiver Subsystem AD6402 FUNCTIONAL BLOCK DIAGRAM RSSI LIMITER/FILTER PLL DEMOD TXOUT TXOUTB 2 CFILT DOUT DFILP AD6402 VCO IF VCO DC OFFSET COMP MODE CONTROL 1 PLLOUT REFSEL COFF REFIN VOLTAGE REGULATOR FMMOD2 VREF FMMOD1 GENERAL DESCRIPTION The AD6402 is a complete transceiver subsystem for use in high bit rate radio systems employing FM or FSK modulation. It is optimized for use in time domain multiple access (TDMA) systems with communications rates of approximately 1 MBPS. The AD6402 integrates key functions, including VCOs and a low drop-out voltage regulator. The AD6402 operates directly from an unregulated battery supply of 3.1 V to 4.5 V and provides a regulated voltage output which can be used for VCO supply regulation on a companion RF chip such as the AD6401. The AD6402 transceiver consists of a mixer, integrated IF bandpass filter, IF limiter with RSSI detection, VCO, PLL demodulator and a low dropout voltage regulator. On receive, it downconverts an IF signal in the 110 MHz range to a second IF frequency, this frequency being determined by the demodulator reference divide ratios. It then filters, amplifies, and demodulates this signal. The AD6402 provides a filtered baseband VREG VBATT SLREF CTL1...3 MODOUT data output. On transmit, it accepts a Gaussian Frequency Shift Keying (GFSK) ba...