AD6622

a FEATURES Wideband Digital IF Parallel Output Wideband Digital IF Parallel Input Allows Cascade of Chips for Additional Channels Programmable IF and Modulation for Each Channel Programmable Interpolating RAM Coefficient Filter High-Speed CIC Interpolating Filter NCO Frequency Translation Worst Spur Better than 100 dBc Tuning Resolution Better than 0.02 Hz Real or Complex Outputs Digital Summation of Channels Clipped or Wrapped Overrange Two’s Complement or Offset Binary Output Separate 3-Wire Serial Data Input for Each Channel Microprocessor Control JTAG Boundary Scan APPLICATIONS Cellular/PCS Base Stations Micro/Pico Cell Base Stations WBCDMA Wireless Local Loop Base Stations Phase Array Beam Forming Antennas Four-Channel, 75 MSPS Digital Transmit Signal Processor (TSP) AD6622 FUNCTIONAL BLOCK DIAGRAM CH A SPORT RCF CIC FILTER CIC FILTER CIC FILTER CIC FILTER NCO 18 CH B SPORT RCF NCO CH C SPORT RCF NCO SUMMATION 18 CH D SPORT RCF NCO JTAG ␮PORT PRODUCT DESCRIPTION The AD6622 comprises four identical digital Transmit Signal Processors (TSPs) complete with synchronization circuitry and cascadable wideband channel summation. An external digitalto-analog converter (DAC) is all that is required to complete a wide band digital up-converter. On-chip tuners allow the relative phase and frequency for each RF carrier to be independently controlled. Each TSP has three cascaded signal processing elements: a RAM-programmable Coefficient interpolating Filter (RCF), a pr...