BUS TRANSCEIVERS-REGISTERS. SN54HCT652 Datasheet

SN54HCT652 TRANSCEIVERS-REGISTERS. Datasheet pdf. Equivalent


Part SN54HCT652
Description OCTAL BUS TRANSCEIVERS-REGISTERS
Feature D Operating Voltage Range of 4.5 V to 5.5 V D Low Power Consumption, 80-µA Max ICC D Typical tpd = 1.
Manufacture etcTI
Datasheet
Download SN54HCT652 Datasheet


D Operating Voltage Range of 4.5 V to 5.5 V D Low Power Cons SN54HCT652 Datasheet
Recommendation Recommendation Datasheet SN54HCT652 Datasheet




SN54HCT652
D Operating Voltage Range of 4.5 V to 5.5 V
D Low Power Consumption, 80-µA Max ICC
D Typical tpd = 12 ns
D ±6-mA Output Drive at 5 V
D Low Input Current of 1 µA Max
D Inputs Are TTL-Voltage Compatible
SN54HCT652 . . . JT OR W PACKAGE
SN74HCT652 . . . DW OR NT PACKAGE
(TOP VIEW)
CLKAB 1
SAB 2
OEAB 3
A1 4
A2 5
A3 6
A4 7
A5 8
A6 9
A7 10
A8 11
GND 12
24 VCC
23 CLKBA
22 SBA
21 OEBA
20 B1
19 B2
18 B3
17 B4
16 B5
15 B6
14 B7
13 B8
SN54HCT652, SN74HCT652
OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCLS179D – MARCH 1984 – REVISED MARCH 2003
D Independent Registers and Enables for
A and B Buses
D Multiplexed Real-Time and Stored Data
D True Data Paths
D High-Current 3-State Outputs Can Drive Up
To 15 LSTTL Loads
SN54HCT652 . . . FK PACKAGE
(TOP VIEW)
4 3 2 1 28 27 26
A1 5
25 OEBA
A2 6
24 B1
A3 7
23 B2
NC 8
22 NC
A4 9
21 B3
A5 10
20 B4
A6 11
19 B5
12 13 14 15 16 17 18
description/ordering information
NC – No internal connection
The ’HCT652 devices consist of bus-transceiver circuits, D-type flip-flops, and control circuitry arranged for
multiplexed transmission of data directly from the data bus or from the internal storage registers. Output-enable
(OEAB and OEBA) inputs are provided to control the transceiver functions. Select-control (SAB and SBA) inputs
are provided to select real-time or stored data transfer. A low input level selects real-time data; a high input level
selects stored data. Figure 1 illustrates the four fundamental bus-management functions that can be performed
with these devices.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP – NT
Tube
SN74HCT652NT
SN74HCT652NT
–40°C to 85°C
SOIC – DW
Tube
Tape and reel
SN74HCT652DW
SN74HCT652DWR
HCT652
CDIP – JT
–55°C to 125°C CFP – W
Tube
Tube
SNJ54HCT652JT
SNJ54HCT652W
SNJ54HCT652JT
SNJ54HCT652W
LCCC – FK
Tube
SNJ54HCT652FK
SNJ54HCT652FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 2003, Texas Instruments Incorporated
1



SN54HCT652
SN54HCT652, SN74HCT652
OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCLS179D MARCH 1984 REVISED MARCH 2003
description/ordering information (continued)
Data on the A or B data bus, or both, can be stored in the internal D-type flip-flops by low-to-high transitions at
the appropriate clock (CLKAB or CLKBA) terminals, regardless of the select- or output-control terminals. When
SAB and SBA are in the real-time transfer mode, it is possible to store data without using the internal D-type
flip-flops by simultaneously enabling OEAB and OEBA. In this configuration, each output reinforces its input.
When all other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains
at its last state.
To ensure the high-impedance state during power up or power down, OEBA should be tied to VCC through a
pullup resistor and OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor
is determined by the current-sinking/current-sourcing capability of the driver.
OEAB
OEBA
INPUTS
CLKAB CLKBA
SAB
FUNCTION TABLE
DATA I/O
SBA
A1A8
B1B8
OPERATION OR FUNCTION
L
H
H or L
H or L
X
X
Input
Input
Isolation
L
H
X
X
Input
Input
X
H
H or L
X
X
Input
Unspecified
H
H
X
X
Input
Output
L
X
H or L
X
X
Unspecified
Input
L
L
X
X
Output
Input
Store A and B data
Store A, hold B
Store A in both registers
Hold A, store B
Store B in both registers
L
L
X
X
X
L
Output
Input
Real-time B data to A bus
L
L
X
H or L
X
H
Output
Input
Stored B data to A bus
H
H
X
X
L
X
Input
Output
Real-time A data to B bus
H
H
H or L
X
H
X
Input
Output
Stored A data to B bus
H
L
H or L
H or L
H
H
Output
Output
Stored A data to B bus and
stored B data to A bus
The data-output functions can be enabled or disabled by a variety of level combinations at OEAB or OEBA. Data-input functions always are
enabled; i.e., data at the bus terminals is stored on every low-to-high transition on the clock inputs.
Select control = L: clocks can occur simultaneously.
Select control = H: clocks must be staggered to load both registers.
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265







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