ADC11C125

ADC11C125 www.ti.com SNAS387C – MAY 2007 – REVISED APRIL 2013 ADC11C125 11-Bit, 125 MSPS, 1.1 GHz Bandwidth A/D Converter with CMOS Outputs Check for Samples: ADC11C125 FEATURES 1 2 1.1 GHz Full Power Bandwidth Internal Sample-and-Hold Circuit Low Power Consumption Internal Precision 1.0V Reference Single-Ended or Differential Clock Modes Clock Duty Cycle Stabilizer Dual +3.3V and +1.8V Supply Operation Power-Down and Sleep Modes Offset Binary or 2's Complement Output Data Format Pin-Compatible: ADC14155, ADC12C170, ADC11C170 48-pin WQFN Package, (7x7x0.8mm, 0.5mm Pin-Pitch) APPLICATIONS High IF Sampling Receivers Wireless Base Station Receivers Power Amplifier Linearization Multi-Carrier, Multi-Mode Receivers Test and Measurement Equipment Communications Instrumentation Radar Systems KEY SPECIFICATIONS Resolution 11 Bits Conversion Rate 125 MSPS SNR (fIN = 70 MHz) 65.5 dBFS (typ) SFDR (fIN = 70 MHz) 88.2 dBFS (typ) ENOB (fIN = 70 MHz) 10.5 bits (typ) Full Power Bandwidth 1.1 GHz (typ) Power Consumption 608 mW (typ) DESCRIPTION The ADC11C125 is a high-performance CMOS analog-to-digital converter capable of converting analog input signals into 11-Bit digital words at rates up to 125 Mega Samples Per Second (MSPS). This converter uses a differential, pipelined architecture with digital error correction and an on-chip sampleand-hold circuit to minimize power consumption and the external component count, while providing excell...