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IDT74ALVCH16245 Dataheets PDF



Part Number IDT74ALVCH16245
Manufacturers Renesas
Logo Renesas
Description 16-bit bus transceiver
Datasheet IDT74ALVCH16245 DatasheetIDT74ALVCH16245 Datasheet (PDF)

IDT74ALVCH16245 3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS 3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS AND BUS-HOLD INDUSTRIAL TEMPERATURE RANGE IDT74ALVCH16245 FEATURES: • 0.5 MICRON CMOS Technology • Typical tSK(o) (Output Skew) < 250ps • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range • VCC = 2.5V ± 0.2V • CMOS power levels (0.4μ W typ. static) • Rail-to-Rail o.

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IDT74ALVCH16245 3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS 3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS AND BUS-HOLD INDUSTRIAL TEMPERATURE RANGE IDT74ALVCH16245 FEATURES: • 0.5 MICRON CMOS Technology • Typical tSK(o) (Output Skew) < 250ps • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range • VCC = 2.5V ± 0.2V • CMOS power levels (0.4μ W typ. static) • Rail-to-Rail output swing for increased noise margin • Available in TSSOP package DRIVE FEATURES: • High Output Drivers: ±24mA • Suitable for heavy loads APPLICATIONS: • 3.3V high speed systems • 3.3V and lower voltage computing systems DESCRIPTION: This 16-bit bus transceiver is built using advanced dual metal CMOS technology. The ALVCH16245 is designed for asynchronous communication between data buses. The control-function implementation minimizes external timing requirements. This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated. The ALVCH16245 has been designed with a ±24mA output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance. The ALVCH16245 has “bus-hold” which retains the inputs’ last state whenever the input bus goes to a high impedance. This prevents floating inputs and eliminates the need for pull-up/down resistors. FUNCTIONAL BLOCK DIAGRAM 1DIR 1 1A1 47 1A2 46 1A3 44 1A4 43 1A5 41 1A6 40 1A7 38 1A8 37 48 1OE 2 1B1 3 1B2 5 1B3 6 1B4 8 1B5 9 1B6 11 1B7 12 1B8 2DIR 24 2A1 36 2A2 35 2A3 33 2A4 32 2A5 30 2A6 29 2A7 27 2A8 26 25 2OE 13 2B1 14 2B2 16 2B3 17 2B4 19 2B5 20 2B6 22 2B7 23 2B8 IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE 1 © 2016 Integrated Device Technology, Inc. AUGUST 2016 DSC-4697/6 IDT74ALVCH16245 3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE PIN CONFIGURATION 1DIR 1 1B1 2 1B2 3 GND 4 1B3 5 1B4 6 VCC 7 1B5 8 1B6 9 GND 10 1B7 11 1B8 12 2B1 13 2B2 14 GND 15 2B3 16 2B4 17 VCC 18 2B5 19 2B6 20 GND 21 2B7 22 2B8 23 2DIR 24 48 1OE 47 1A1 46 1A2 45 GND 44 1A3 43 1A4 42 VCC 41 1A5 40 1A6 39 GND 38 1A7 37 1A8 36 2A1 35 2A2 34 GND 33 2A3 32 2A4 31 VCC 30 2A5 29 2A6 28 GND 27 2A7 26 2A8 25 2OE ABSOLUTE MAXIMUM RATINGS(1) Symbol Description Max Unit VTERM(2) Terminal Voltage with Respect to GND –0.5 to +4.6 V VTERM(3) Terminal Voltage with Respect to GND –0.5 to VCC+0.5 V TSTG Storage Temperature –65 to +150 °C IOUT DC Output Current –50 to +50 mA IIK Continuous Clamp Current, VI < 0 or VI > VCC ±50 mA IOK Continuous Clamp Current, VO < 0 –50 mA ICC Continuous Current through each ISS VCC or GND ±100 mA NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. VCC terminals. 3. All terminals except VCC. CAPACITANCE (TA = +25°C, F = 1.0MHz) Symbol Parameter(1) Conditions Typ. Max. Unit CIN Input Capacitance VIN = 0V 5 COUT Output Capacitance VOUT = 0V 7 7 pF 9 pF CI/O I/O Port Capacitance VIN = 0V 7 9 pF NOTE: 1. As applicable to the device type. PIN DESCRIPTION Pin Names xOE DIR Description Output Enable Inputs (Active LOW) Direction Control Inputs xAx Side A Inputs or 3-State Outputs(1) xBx Side B Inputs or 3-State Outputs(1) NOTE: 1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os. TSSOP TOP VIEW FUNCTION TABLE (EACH 8-BIT SECTION)(1) Inputs xOE xDIR Outputs L L Bus B Data to Bus A L H Bus A Data to Bus B H X NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care High Z state 2 IDT74ALVCH16245 3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Operating Condition: TA = –40°C to +85°C Symbol Parameter Test Conditions Min. Typ.(1) Max. Unit VIH Input HIGH Voltage Level VCC = 2.3V to 2.7V 1.7 — — V VCC = 2.7V to 3.6V 2 — — VIL Input LOW Voltage Level VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V — — 0.7 V — — 0.8 IIH Input HIGH Current VCC = 3.6V VI = VCC — — ±5 μA IIL Input L.


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