SN74AS11

D 4.5-V to 5.5-V VCC Operation D Max tpd of 5.5 ns at 5 V SN54ALS11A, SN54AS11, SN74ALS11A, SN74AS11 TRIPLE 3-INPUT POSITIVE-AND GATES SDAS009D – MARCH 1984 – REVISED NOVEMBER 2002 SN54ALS11A, . . . J OR W PACKAGE SN54AS11 . . . J PACKAGE SN74ALS11A, SN74AS11 . . . D, N, OR NS PACKAGE (TOP VIEW) 1A 1 1B 2 2A 3 2B 4 2C 5 2Y 6 GND 7 14 VCC 13 1C 12 1Y 11 3C 10 3B 9 3A 8 3Y SN54ALS11A, SN54AS11 . . . FK PACKAGE (TOP VIEW) 1C VCC NC 1A 1B 3 2 1 20 19 2A 4 18 1Y NC 5 17 NC 2B 6 16 3C NC 7 15 NC 2C 8 14 3B 9 10 11 12 13 3A 3Y NC GND 2Y description/ordering information NC – No internal connection These devices contain three independent 3-input positive-AND gates. They perform the Boolean functions + + ) ) Y A B C or Y A B C in positive logic. ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING PDIP – N Tube SN74ALS11AN SN74AS11N SN74ALS11AN SN74AS11N 0°C to 70°C SOIC – D Tube Tape and reel Tube Tape and reel SN74ALS11AD SN74ALS11ADR SN74AS11D SN74AS11DR ALS11A AS11 SOP – NS Tape and reel SN74ALS11ANSR SN74AS11NSR ALS11A 74AS11 CDIP – J Tube SNJ54ALS11AJ SNJ54AS11J SNJ54ALS11AJ SNJ54AS11J –55°C to 125°C CFP – W Tube SNJ54ALS11AW SNJ54ALS11AW LCCC – FK Tube SNJ54ALS11AFK SNJ54AS11FK SNJ54ALS11AFK SNJ54AS11FK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning...