QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE
SN54ALS136, SN54AS136, SN74ALS136, SN74AS136 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES WITH OPEN-COLLECTOR OUTPUTS
SDAS162 – ...
Description
SN54ALS136, SN54AS136, SN74ALS136, SN74AS136 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES WITH OPEN-COLLECTOR OUTPUTS
SDAS162 – MARCH 1984–REVISED OCTOBER 1988
Package Options include Plastic “Small
Outline” Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs
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Reliability
description
These devices contain four independent Exclusive-OR gates with open-collector outputs. They perform the Boolean functions Y = A ⊕ B = AB + AB in positive logic.
A common application is a true/complement element. If one of the inputs is low, the other input will be reproduced in true form at the output. If one of the inputs is high, the signal on the other input will be reproduced inverted at the output.
The SN54ALS136 and SN54AS136 are characterized for operation over the full military temperature range of –55°C to 125°C. The SN74ALS136 and SN74AS136 are characterized for operation from 0°C to 70°C.
SN54ALS136, SN54AS136 . . . J PACKAGE SN74ALS136, SN74AS136 . . . D OR N PACKAGE
(TOP VIEW)
1A 1 1B 2 1Y 3 2A 4 2B 5 2Y 6 GND 7
14 VCC 13 4B 12 4A 11 4Y 10 3B 9 3A 8 3Y
SN54ALS136, SN54AS136 . . . FK PACKAGE (TOP VIEW)
1B 1A NC VCC 4B
1Y
3 2 1 20 19
4
18
4A
NC 5
17 NC
2A 6
16 4Y
NC 7
15 NC
2B 8
14 3B
9 10 11 12 13
2Y GND
NC 3Y 3A
logic symbol†
1
1A
=1
2
1B 4
2A 5
2B 9
3A 10
3B 12
4A 13
4B
3 1Y
6 2Y
8 3Y
11 4Y
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers ...
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