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SN74AS174 Dataheets PDF



Part Number SN74AS174
Manufacturers Texas Instruments
Logo Texas Instruments
Description HEX/QUADRUPLE D-TYPE FLIP-FLOP
Datasheet SN74AS174 DatasheetSN74AS174 Datasheet (PDF)

SN54ALS174, SN54ALS175, SN54AS174, SN54AS175B SN74ALS174, SN74ALS175, SN74AS174, SN74AS175B HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR SDAS207E - APRIL 1982 - REVISED MAY 2002 D ’ALS174 and ’AS174 Contain Six Flip-Flops With Single-Rail Outputs D ’ALS175 and ’AS175B Contain Four Flip-Flops With Double-Rail Outputs D Buffered Clock and Direct-Clear Inputs D Applications Include: – Buffer/Storage Registers – Shift Registers – Pattern Generators D Fully Buffered Outputs for Maximum Isolation From.

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SN54ALS174, SN54ALS175, SN54AS174, SN54AS175B SN74ALS174, SN74ALS175, SN74AS174, SN74AS175B HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR SDAS207E - APRIL 1982 - REVISED MAY 2002 D ’ALS174 and ’AS174 Contain Six Flip-Flops With Single-Rail Outputs D ’ALS175 and ’AS175B Contain Four Flip-Flops With Double-Rail Outputs D Buffered Clock and Direct-Clear Inputs D Applications Include: – Buffer/Storage Registers – Shift Registers – Pattern Generators D Fully Buffered Outputs for Maximum Isolation From External Disturbances (’AS Only) SN54ALS174 . . . J OR W PACKAGE SN54AS174 . . . J PACKAGE SN74ALS174, SN74AS174 . . . D , N, OR NS PACKAGE (TOP VIEW) SN54ALS175 . . . J OR W PACKAGE SN54AS175B . . . J PACKAGE SN74ALS175, SN74AS175B . . . D, N, OR NS PACKAGE (TOP VIEW) CLR 1 1Q 2 1D 3 2D 4 2Q 5 3D 6 3Q 7 GND 8 16 VCC 15 6Q 14 6D 13 5D 12 5Q 11 4D 10 4Q 9 CLK CLR 1 1Q 2 1Q 3 1D 4 2D 5 2Q 6 2Q 7 GND 8 16 VCC 15 4Q 14 4Q 13 4D 12 3D 11 3Q 10 3Q 9 CLK SN54ALS174, SN54AS174 . . . FK PACKAGE (TOP VIEW) SN54ALS175 . . . FK PACKAGE (TOP VIEW) 1Q CLR NC VCC 4Q 1Q CLR NC VCC 6Q 3 2 1 20 19 1D 4 18 6D 2D 5 17 5D NC 6 16 NC 2Q 7 15 5Q 3D 8 14 4D 9 10 11 12 13 3 2 1 20 19 1Q 4 18 4Q 1D 5 17 4D NC 6 16 NC 2D 7 15 3D 2Q 8 14 3Q 9 10 11 12 13 2Q GND NC CLK 3Q 3Q GND NC CLK 4Q NC – No internal connection description These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. All have a direct-clear (CLR) input. The ’ALS175 and ’AS175B feature complementary outputs from each flip-flop. Information at the data (D) inputs meeting the setup-time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock (CLK) input is at either the high or low level, the D-input signal has no effect at the output. These circuits are fully compatible for use with most TTL circuits. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 Copyright  2002, Texas Instruments Incorporated On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. 1 SN54ALS174, SN54ALS175, SN54AS174, SN54AS175B SN74ALS174, SN74ALS175, SN74AS174, SN74AS175B HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR SDAS207E - APRIL 1982 - REVISED MAY 2002 ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING SN74ALS174N SN74ALS174N PDIP – N Tube SN74AS174N SN74ALS175N SN74AS174N SN74ALS175N SN74AS175BN SN74AS175BN Tube Tape and reel SN74ALS174D SN74ALS174DR ALS174 0°C to 70°C SOIC – D Tube Tape and reel Tube Tape and reel SN74AS174D SN74AS174DR SN74ALS175D SN74ALS175DR AS174 ALS175 Tube Tape and reel SN74AS175BD SN74AS175BDR AS175B SN74ALS174NSR ALS174 SOP – NS Tape and reel SN74AS174NSR SN74ALS175NSR 74AS174 ALS175 SN74AS175BNSR 74AS175B SNJ54ALS174J SNJ54ALS174J CDIP – J Tube SNJ54AS174J SNJ54ALS175J SNJ54AS174J SNJ54ALS175J SNJ54AS175BJ SNJ54AS175BJ –55°C to 125°C CFP – W Tube SNJ54ALS174W SNJ54ALS175W SNJ54ALS174W SNJ54ALS175W LCCC – FK Tube SNJ54ALS174FK SNJ54AS174FK‡ SNJ54ALS174FK SNJ54AS174FK SNJ54ALS175FK SNJ54ALS175FK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. ‡ This orderable is not recommended for new designs. FUNCTION TABLE (each flip-flop) INPUTS OUTPUTS CLR CLK D Q Q§ L X X L H H ↑ H H L H ↑ L L H H L X Q0 Q0 § ’ALS175 and ’AS175B only 2 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 logic diagrams (positive logic) CLR 1 ’ALS174, ’AS174 9 CLK 1D 3 1D C1 R SN54ALS174, SN54ALS175, SN54AS174, SN54AS175B SN74ALS174, SN74ALS175, SN74AS174, SN74AS175B HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR SDAS207E - APRIL 1982 - REVISED MAY 2002 2 1Q 9 CLK 1 CLR 4 1D ’ALS175, ’AS175B 1D C1 R 2 1Q 3 1Q To Five Other Channels Pin numbers shown are for the D, J, N, NS, and W packages. To Three Other Channels absolute maximum ratings over operating free-air temperature range, SN54/74ALS174, SN54/74ALS175 (unless otherwise noted)† Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input .


SN74ALS175 SN74AS174 SN74AS175B


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