Dual 4-Input Positive-NAND Gate
SN54ALS20A, SN54AS20, SN74ALS20A, SN74AS20 DUAL 4ĆINPUT POSITIVEĆNAND GATES
• Package Options Include Plastic
Small-Out...
Description
SN54ALS20A, SN54AS20, SN74ALS20A, SN74AS20 DUAL 4ĆINPUT POSITIVEĆNAND GATES
Package Options Include Plastic
Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs
description
These devices contain two independent 4-input positive-NAND gates. They perform the Boolean functions Y = A B C D or Y = A + B + C + D in positive logic.
The SN54ALS20A and SN54AS20 are characterized for operation over the full military temperature range of − 55°C to 125°C. The SN74ALS20A and SN74AS20 are characterized for operation from 0°C to 70°C.
1B
1A
NC
VCC
SDAS192B − APRIL 1982 − REVISED DECEMBER 1994
SN54ALS20A, SN54AS20 . . . J PACKAGE SN74ALS20A, SN74AS20 . . . D OR N PACKAGE
(TOP VIEW)
1A 1 1B 2 NC 3 1C 4 1D 5 1Y 6 GND 7
14 VCC 13 2D 12 2C 11 NC 10 2B 9 2A 8 2Y
SN54ALS20A, SN54AS20 . . . FK PACKAGE (TOP VIEW)
2D
FUNCTION TABLE (each gate)
INPUTS
OUTPUT
A
B
C
D
Y
H
H
H
H
L
L
X
X
X
H
X
L
X
X
H
X
X
L
X
H
X
X
X
L
H
3 2 1 20 19
NC 4
18 2C
NC 5
17 NC
1C 6
16 NC
NC 7
15 NC
1D 8
14 2B
9 10 11 12 13
2A
2Y
NC
GND
1Y
NC − No internal connection
logic symbol†
logic diagram (positive logic)
1 1A
&
2
1B
4
1C
5
1D
9 2A
10 2B
12 2C
13 2D
6 1Y
8 2Y
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
1A 1 2
1B 1C 4
5 1D
9 2A
10 2B 2C 12
13 2D
6 1Y
8 2Y
PRODUCTION DATA information is curren...
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