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SN54AS575 Dataheets PDF



Part Number SN54AS575
Manufacturers Texas Instruments
Logo Texas Instruments
Description OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOP
Datasheet SN54AS575 DatasheetSN54AS575 Datasheet (PDF)

SN54ALS574B, SN54AS574, SN54AS575 SN74ALS574B, SN74ALS575A, SN74AS574, SN74AS575 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SDAS165B – JUNE 1982 – REVISED JULY 1995 • 3-State Buffer-Type Noninverting Outputs Drive Bus Lines Directly • Bus-Structured Pinout • Buffered Control Inputs • SN74ALS575A and ′AS575 Have Synchronous Clear • Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), Standard Plastic (N, NT) and Ceramic (J, JT) 300-mil DIPs, a.

  SN54AS575   SN54AS575


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SN54ALS574B, SN54AS574, SN54AS575 SN74ALS574B, SN74ALS575A, SN74AS574, SN74AS575 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SDAS165B – JUNE 1982 – REVISED JULY 1995 • 3-State Buffer-Type Noninverting Outputs Drive Bus Lines Directly • Bus-Structured Pinout • Buffered Control Inputs • SN74ALS575A and ′AS575 Have Synchronous Clear • Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), Standard Plastic (N, NT) and Ceramic (J, JT) 300-mil DIPs, and Ceramic Flat (W) Packages SN54ALS574B, SN54AS574 . . . J OR W PACKAGE SN74ALS574B, SN74AS574 . . . DW OR N PACKAGE (TOP VIEW) OE 1 1D 2 2D 3 3D 4 4D 5 5D 6 6D 7 7D 8 8D 9 GND 10 20 VCC 19 1Q 18 2Q 17 3Q 16 4Q 15 5Q 14 6Q 13 7Q 12 8Q 11 CLK description SN54ALS574B, SN54AS574 . . . FK PACKAGE (TOP VIEW) 2D 1D OE VCC 1Q These octal D-type edge-triggered flip-flops feature 3-state outputs designed specifically for bus driving. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The eight flip-flops enter data on the low-to-high transition of the clock (CLK) input. The SN74ALS575A, SN54AS575, and SN74AS575 may be synchronously cleared by taking the clear (CLR) input low. The output-enable (OE) input does not affect internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. The SN54ALS574B, SN54AS574, and SN54AS575 are characterized for operation over the full military temperature range of – 55°C to 125°C. The SN74ALS574B, SN74ALS575A, SN74AS574, and SN74AS575 are characterized for operation from 0°C to 70°C. 3 2 1 20 19 3D 4 18 2Q 4D 5 17 3Q 5D 6 16 4Q 6D 7 15 5Q 7D 8 14 6Q 9 10 11 12 13 8D GND CLK 8Q 7Q SN54AS575 . . . JT OR W PACKAGE SN74ALS575A, SN74AS575 . . . DW OR NT PACKAGE (TOP VIEW) CLR 1 OE 2 1D 3 2D 4 3D 5 4D 6 5D 7 6D 8 7D 9 8D 10 NC 11 GND 12 24 VCC 23 NC 22 1Q 21 2Q 20 3Q 19 4Q 18 5Q 17 6Q 16 7Q 15 8Q 14 CLK 13 NC SN54AS575 . . . FK PACKAGE (TOP VIEW) 1D OE CLR NC VCC NC 1Q 4 3 2 1 28 27 26 2D 5 25 2Q 3D 6 24 3Q 4D 7 23 4Q NC 8 22 NC 5D 9 21 5Q 6D 10 20 6Q 7D 11 19 7Q 12 13 14 15 16 17 18 8D NC GND NC NC CLK 8Q NC – No internal connection PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 Copyright © 1995, Texas Instruments Incorporated 1 SN54ALS574B, SN54AS574, SN54AS575 SN74ALS574B, SN74ALS575A, SN74AS574, SN74AS575 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SDAS165B – JUNE 1982 – REVISED JULY 1995 Function Tables SN54ALS574B, SN74ALS574B, SN54AS574, SN74AS574 (each flip-flop) INPUTS OE CLK D OUTPUT Q L ↑ H H L ↑ L L L L X Q0 H X X Z SN74ALS575A, SN54AS575, SN74AS575 (each flip-flop) INPUTS OUTPUT OE CLR CLK D Q L L ↑ X L L H ↑ H H L H ↑ L L L H L X Q0 H X H X Z logic symbols† SN54ALS574B, SN74ALS574B, SN54AS574, SN74AS574 SN74ALS575A, SN54AS575, SN74AS575 1 OE 11 CLK 2 1D 3 2D 4 3D 5 4D 6 5D 7 6D 8 7D 9 8D EN C1 1D 19 1Q 18 2Q 17 3Q 16 4Q 15 5Q 14 6Q 13 7Q 12 8Q 2 OE 14 CLK 1 CLR 3 1D 4 2D 5 3D 6 4D 7 5D 8 6D 9 7D 10 8D EN C1 1R 1D † These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the DW, J, JT, N, and NT packages. 22 1Q 21 2Q 20 3Q 19 4Q 18 5Q 17 6Q 16 7Q 15 8Q 2 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 SN54ALS574B, SN54AS574, SN54AS575 SN74ALS574B, SN74ALS575A, SN74AS574, SN74AS575 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SDAS165B – JUNE 1982 – REVISED JULY 1995 logic diagrams (positive logic) SN54ALS574B, SN74ALS574B, SN54AS574, SN74AS574 SN74ALS575A, SN54AS575, SN74AS575 1 OE 11 CLK 2 1D C1 1D 19 1Q 2 OE 14 CLK 1 CLR 3 1D C1 1D 22 1Q To Seven Other Channels Pin numbers shown are for the DW, J, JT, N, and NT packages. To Seven Other Channels absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Operating free-air temperature range, TA: SN54ALS574B . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C SN74ALS574B, SN74ALS575A . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . .


SN54AS574 SN54AS575 SN74ALS574B


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