SN74ALS575A

SN54ALS574B, SN54AS574, SN54AS575 SN74ALS574B, SN74ALS575A, SN74AS574, SN74AS575 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SDAS165B – JUNE 1982 – REVISED JULY 1995 3-State Buffer-Type Noninverting Outputs Drive Bus Lines Directly Bus-Structured Pinout Buffered Control Inputs SN74ALS575A and ′AS575 Have Synchronous Clear Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), Standard Plastic (N, NT) and Ceramic (J, JT) 300-mil DIPs, and Ceramic Flat (W) Packages SN54ALS574B, SN54AS574 . . . J OR W PACKAGE SN74ALS574B, SN74AS574 . . . DW OR N PACKAGE (TOP VIEW) OE 1 1D 2 2D 3 3D 4 4D 5 5D 6 6D 7 7D 8 8D 9 GND 10 20 VCC 19 1Q 18 2Q 17 3Q 16 4Q 15 5Q 14 6Q 13 7Q 12 8Q 11 CLK description SN54ALS574B, SN54AS574 . . . FK PACKAGE (TOP VIEW) 2D 1D OE VCC 1Q These octal D-type edge-triggered flip-flops feature 3-state outputs designed specifically for bus driving. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The eight flip-flops enter data on the low-to-high transition of the clock (CLK) input. The SN74ALS575A, SN54AS575, and SN74AS575 may be synchronously cleared by taking the clear (CLR) input low. The output-enable (OE) input does not affect internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. The SN54ALS574B, SN54AS574, and SN54AS575 are charact...