SN74S225

SN74S225 16 × 5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY WITH 3-STATE OUTPUTS SDLS207B – SEPTEMBER 1976 – REVISED APRIL 1998 D Independent Asychronous Inputs and Outputs D 16 Words by 5 Bits D DC to 10-MHz Data Rate D 3-State Outputs D Packaged in Standard Plastic 300-mil DIPs description This 80-bit active-element memory is a monolithic Schottky-clamped transistor-transistor logic (STTL) array organized as 16 words by 5 bits. A memory system using the SN74S225 easily can be expanded in multiples of 48 words or of 10 bits as shown in Figure 3. The 3-state outputs controlled by a single output-enable (OE) input make bus connection and multiplexing easy. N PACKAGE (TOP VIEW) CLKA 1 IR 2 UNCK OUT 3 D0 4 D1 5 D2 6 D3 7 D4 8 OE 9 GND 10 20 VCC 19 CLKB 18 CLR 17 OR 16 UNCK IN 15 Q0 14 Q1 13 Q2 12 Q3 11 Q4 A first-in, first-out (FIFO) memory is a storage device that allows data to be written into and read from its array at independent data rates. This FIFO is designed to process data at rates from dc to 10 MHz in a bit-parallel format, word by word. Reading or writing is done independently, utilizing separate asynchronous data clocks. Data can be written into the array on the low-to-high transition of either load-clock (CLKA, CLKB) input. Data can be read out of the array on the low-to-high transition of the unload-clock (UNCK IN) input (normally high). Writing data into the FIFO can be accomplished in one of two ways: D In applications not requiring a gated clock control, best...