SN74LV393A

SN74LV393A SCLS457E – FEBRUARY 2001 – REVISED MARCH 2023 SN74LV393A Dual 4-Bit Binary Counters 1 Features VCC operation of 2 V to 5.5 V Max tpd of 10 ns at 5 V Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot) > 2.3 V at VCC = 3.3 V, TA = 25°C Ioff supports Partial-Power-Down-Mode operation Dual 4-bit binary counters with individual clocks Direct clear for each 4-bit counter Can significantly improve system densities by reducing counter package count by 50 percent Latch-Up performance exceeds 100 mA per JESD 78, Class II 2 Applications Synchronize invterted clock inputs Debounce a switch Invert a digital signal 3 Description The 'LV393A devices contain eight flip-flops and additional gating to implement two individual 4-bit counters in a single package. These devices are designed for 2 V to 5.5 V VCC operation. Package Information PART NUMBER PACKAGE(1) BODY SIZE (NOM) D (SOIC, 14) 8.65 mm x 3.9 mm NS (SOP, 14) 10.3 mm x 5.3 mm SN74LV393A DB (SSOP, 14) 6.2 mm x 5.3 mm PW (TSSOP, 14) 5 mm x 4.4 mm DGV (TVSOP, 14) 3.6 mm x 4.4 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Figure 3-1. Logic Diagram, Each Counter (Positive Logic) An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. UNLESS OTHERWISE N...