2SK1334

2SK1334 Silicon N Channel MOS FET Application High speed power switching Features Low on-resistance High speed switching Low drive current No secondary Breakdown Suitable for switching regulator and DC-DC converter REJ03G0932-0200 (Previous: ADE-208-1271) Rev.2.00 Sep 07, 2005 Outline RENESAS Package code: PLZZ0004CA-A (Package name: UPAK R ) 21 3 4 D 1. Gate 2. Drain G 3. Source 4. Drain Note: Marking is “BY”. S *UPAK is a trademark of Renesas Technology Corp. Rev.2.00 Sep 07, 2005 page 1 of 6 2SK1334 Absolute Maximum Ratings Item Symbol Drain to source voltage VDSS Gate to source voltage VGSS Drain current Drain peak current ID ID(pulse)*1 Body to drain diode reverse drain current Channel dissipation IDR Pch*2 Channel temperature Tch Storage temperature Tstg Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1% 2. When using the alumina ceramic board (12.5 × 20 × 0.7 mm) Ratings 200 ±20 1 2 1 1 150 –55 to +150 (Ta = 25°C) Unit V V A A A W °C °C Electrical Characteristics (Ta = 25°C) Item Symbol Min Typ Max Unit Test conditions Drain to source breakdown voltage V(BR)DSS 200 — — V ID = 10 mA, VGS = 0 Gate to source breakdown voltage V(BR)GSS ±20 — — V IG = ±100 µA, VDS = 0 Gate to source leak current IGSS — — ±10 µA VGS = ±16 V, VDS = 0 Zero gate voltage drain current IDSS — — 50 µA VDS = 160 V, VGS = 0 Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance VGS(off) 2.0 — ...