SN74AHC32-EP

SN74AHC32-EP QUADRUPLE 2-INPUT POSITIVE-OR GATE D Controlled Baseline – One Assembly/Test Site, One Fabrication Site D Extended Temperature Performance of –55°C to 125°C D Enhanced Diminishing Manufacturing Sources (DMS) Support D Enhanced Product-Change Notification D Qualification Pedigree† D EPIC (Enhanced-Performance Implanted CMOS) Process D Operating Range 2-V to 5.5-V VCC D Latch-Up Performance Exceeds 250 mA Per JESD 17 D ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) † Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits. SCLS488 – JUNE 2003 D OR PW PACKAGE (TOP VIEW) 1A 1 1B 2 1Y 3 2A 4 2B 5 2Y 6 GND 7 14 VCC 13 4B 12 4A 11 4Y 10 3B 9 3A 8 3Y description/ordering information The SN74AHC32 is a quadruple 2-input positive-OR gate. This device performs the Boolean function + + ) Y A B or Y A B in positive logic. ORDERING INFORMATION TA PACKAGE‡ ORDERABLE PART NUMBER TOP-SIDE MARKING –55°C to 125°C SOIC – D TSSOP – PW Tape and reel Tape and reel SN74AHC32MDREP SN74AH...