74AHC04D

74AHC04; 74AHCT04 Hex inverter Rev. 7 — 10 September 2020 Product data sheet 1. General description The 74AHC04; 74AHCT04 is a high-speed Si-gate CMOS device and is pin compatible with Lowpower Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC04; 74AHCT04 provides six inverting buffers. 2. Features and benefits Balanced propagation delays Inputs accept voltages higher than VCC Input levels: For 74AHC04: CMOS level For 74AHCT04: TTL level ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101C exceeds 1000 V Multiple package options Specified from -40 °C to +85 °C and from -40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range 74AHC04D -40 °C to +125 °C 74AHCT04D 74AHC04PW -40 °C to +125 °C 74AHCT04PW 74AHC04BQ -40 °C to +125 °C 74AHCT04BQ Name SO14 TSSOP14 DHVQFN14 Description plastic small outline package; 14 leads; body width 3.9 mm Version SOT108-1 plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 plastic dual in-line compatible thermal SOT762-1 enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 × 3 × 0.85 mm Nexperia 4. Functional diagram 1 1A 3 2A 5 3A 9 4A 11 5A 13 6A 1Y 2 2Y 4 3Y 6 4Y 8 5Y 10 6Y 12 Fig. 1. Logic symbol mna342 A Fig. 3. Logic diagram (one inverter) 5. Pinning information 5.1. Pinning 74HC04 74HCT04 1A 1 1Y 2 2A 3...