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74AHCT138D Dataheets PDF



Part Number 74AHCT138D
Manufacturers nexperia
Logo nexperia
Description 3-to-8 line decoder/demultiplexer
Datasheet 74AHCT138D Datasheet74AHCT138D Datasheet (PDF)

74AHC138; 74AHCT138 3-to-8 line decoder/demultiplexer; inverting Rev. 5 — 10 September 2020 Product data sheet 1. General description The 74AHC138; 74AHCT138 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC138; 74AHCT138 is a 3-to-8 line decoder/demultiplexer. It accepts three binary weighted address inputs (A0, A1 and A2) and, when enabled, provides eight mutually exclusive ou.

  74AHCT138D   74AHCT138D


74AHC138D 74AHCT138D 74AHCT138PW


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