74AHC3GU04DC

74AHC3GU04 Triple unbuffered inverter Rev. 6 — 27 February 2019 Product data sheet 1. General description The 74AHC3GU04 is a high-speed Si-gate CMOS device. This device provides three inverter gates with unbuffered outputs. 2. Features and benefits Symmetrical output impedance High noise immunity ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101D exceeds 1000 V Low power dissipation Balanced propagation delays Specified from -40 °C to +85 °C and from -40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range 74AHC3GU04DP -40 °C to +125 °C 74AHC3GU04DC -40 °C to +125 °C Name TSSOP8 VSSOP8 Description plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm plastic very thin shrink small outline package; 8 leads; body width 2.3 mm Version SOT505-2 SOT765-1 4. Marking Table 2. Marking codes Type number 74AHC3GU04DP 74AHC3GU04DC Marking code [1] AU4 AU4 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. Nexperia 5. Functional diagram 1 1 7 1 1A 3 2A 6 3A 1Y 7 2Y 5 3Y 2 mna720 Fig. 1. Logic symbol 3 1 5 6 1 2 mna721 Fig. 2. IEC logic symbol 6. Pinning information 74AHC3GU04 Triple unbuffered inverter A Y mna045 Fig. 3. Logic diagram (one gate) 6.1. Pinning 74AHC3GU04 1A 1 3Y 2 2A 3 GND 4 8 VCC 7 1Y 6 3A 5 2Y 001aaj517 Fig. 4. Pin configuration S...