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74HC08D Dataheets PDF



Part Number 74HC08D
Manufacturers nexperia
Logo nexperia
Description Quad 2-input AND gate
Datasheet 74HC08D Datasheet74HC08D Datasheet (PDF)

74HC08; 74HCT08 Quad 2-input AND gate Rev. 8 — 10 August 2021 Product data sheet 1. General description The 74HC08; 74HCT08 is a quad 2-input AND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Wide supply voltage range from 2.0 V to 6.0 V • CMOS low power dissipation • High noise immunity • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B • Input levels: • For 74.

  74HC08D   74HC08D



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74HC08; 74HCT08 Quad 2-input AND gate Rev. 8 — 10 August 2021 Product data sheet 1. General description The 74HC08; 74HCT08 is a quad 2-input AND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Wide supply voltage range from 2.0 V to 6.0 V • CMOS low power dissipation • High noise immunity • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B • Input levels: • For 74HC08: CMOS level • For 74HCT08: TTL level • Complies with JEDEC standards: • JESD8C (2.7 V to 3.6 V) • JESD7A (2.0 V to 6.0 V) • ESD protection: • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V • Multiple package options • Specified from -40 °C to +85 °C and from -40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name 74HC08D -40 °C to +125 °C SO14 74HCT08D 74HC08PW -40 °C to +125 °C TSSOP14 74HCT08PW 74HC08BQ -40 °C to +125 °C DHVQFN14 74HCT08BQ Description plastic small outline package; 14 leads; body width 3.9 mm plastic thin shrink small outline package; 14 leads; body width 4.4 mm plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 × 3 × 0.85 mm Version SOT108-1 SOT402-1 SOT762-1 Nexperia 4. Functional diagram 1 & 3 2 1 1A 2 1B 4 2A 5 2B 9 3A 10 3B 12 4A 13 4B 1Y 3 2Y 6 3Y 8 4Y 11 mna222 Fig. 1. Logic symbol 4 & 6 5 9 & 8 10 12 & 11 13 mna223 Fig. 2. IEC logic symbol 5. Pinning information 74HC08; 74HCT08 Quad 2-input AND gate A B Fig. 3. IEC logic symbol Y mna221 5.1. Pinning 74HC08 74HCT08 1A 1 14 VCC 1B 2 13 4B 1Y 3 12 4A 2A 4 11 4Y 2B 5 10 3B 2Y 6 9 3A GND 7 8 3Y aaa-004035 Fig. 4. Pin configuration SOT108-1 (SO14) and SOT402-1 (TSSOP14) 5.2. Pin description Table 2. Pin description Symbol 1A, 2A, 3A, 4A 1B, 2B, 3B, 4B 1Y, 2Y, 3Y, 4Y GND VCC Pin 1, 4, 9, 12 2, 5, 10, 13 3, 6, 8, 11 7 14 74HC08 74HCT08 1 1A 14 VCC terminal 1 index area 1B 2 1Y 3 2A 4 2B 5 2Y 6 GND(1) 13 4B 12 4A 11 4Y 10 3B 9 3A GND 7 3Y 8 aaa-004036 Fig. 5. Transparent top view (1) This is not a ground pin. There is no electrical or mechanical requirement to solder the pad. In case soldered, the solder land should remain floating or connected to GND. Pin configuration SOT762-1 (DHVQFN14) Description data input data input data output ground (0 V) supply voltage 74HC_HCT08 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 — 10 August 2021 © Nexperia B.V. 2021. All rights reserved 2 / 13 Nexperia 74HC08; 74HCT08 Quad 2-input AND gate 6. Functional description Table 3. Function table H = HIGH voltage level; L = LOW voltage level; X = don’t care. Input nA nB L L L H H L H H Output nY L L L H 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages.


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