74HC139D

74HC139; 74HCT139 Dual 2-to-4 line decoder/demultiplexer Rev. 5 — 14 January 2021 Product data sheet 1. General description The 74HC139; 74HCT139 decodes two binary weighted address inputs (nA0, nA1) to four mutually exclusive outputs (nY0 to nY3). Each decoder features an enable input (nE). When nE is HIGH all outputs are forced HIGH. The enable input can be used as the data input for a 1-to-4 demultiplexer application. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits Input levels: For 74HC139: CMOS level For 74HCT139: TTL level Demultiplexing capability 2 independent 2-to-4 decoders Multifunction capability Suitable for memory decoding, data routing or code conversion Complies with JEDEC standard no. 7A Active LOW mutually exclusive outputs ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Specified from -40 °C to +85 °C and from -40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name 74HC139D -40 °C to +125 °C SO16 74 HCT139D 74HC139PW -40 °C to +125 °C TSSOP16 74HCT139PW Description plastic small outline package; 16 leads; body width 3.9 mm plastic thin shrink small outline package; 16 leads; body width 4.4 mm Version SOT109-1 SOT403-1 Nexperia 4. Functional diagram 74HC139; 74HCT139 Dual 2-to-4 line decoder/demultiplexer 1 1E 1Y0 4 ...