DatasheetsPDF.com

74HC3G04DC Dataheets PDF



Part Number 74HC3G04DC
Manufacturers nexperia
Logo nexperia
Description Triple inverter
Datasheet 74HC3G04DC Datasheet74HC3G04DC Datasheet (PDF)

74HC3G04; 74HCT3G04 Triple inverter Rev. 5 — 26 November 2018 Product data sheet 1. General description The 74HC3G04; 74HCT3G04 is a triple inverter. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Wide supply voltage range from 2.0 V to 6.0 V • Input levels: • For 74HC3G04: CMOS level • For 74HCT3G04: TTL level • Symmetrical output impedance • High noise immunity • Low power dissipat.

  74HC3G04DC   74HC3G04DC



Document
74HC3G04; 74HCT3G04 Triple inverter Rev. 5 — 26 November 2018 Product data sheet 1. General description The 74HC3G04; 74HCT3G04 is a triple inverter. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Wide supply voltage range from 2.0 V to 6.0 V • Input levels: • For 74HC3G04: CMOS level • For 74HCT3G04: TTL level • Symmetrical output impedance • High noise immunity • Low power dissipation • Balanced propagation delays • ESD protection: • HBM JESD22-A114E exceeds 2000 V • MM JESD22-A115-A exceeds 200 V • Specified from -40 °C to +85 °C and -40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range 74HC3G04DP -40 °C to +125 °C 74HCT3G04DP 74HC3G04DC -40 °C to +125 °C 74HCT3G04DC Name TSSOP8 VSSOP8 Description plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm plastic very thin shrink small outline package; 8 leads; body width 2.3 mm Version SOT505-2 SOT765-1 4. Marking Table 2. Marking codes Type number 74HC3G04DP 74HCT3G04DP 74HC3G04DC 74HCT3G04DC Marking code[1] H04 T04 H04 T04 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. Nexperia 5. Functional diagram 1 1 7 1 1A 3 2A 6 3A 1Y 7 2Y 5 3Y 2 mna720 Fig. 1. Logic symbol 3 1 5 6 1 2 mna721 Fig. 2. IEC logic symbol 6. Pinning information 74HC3G04; 74HCT3G04 Triple inverter A Y mna110 Fig. 3. Logic diagram (one gate) 6.1. Pinning 74HC3G04 74HCT3G04 1A 1 3Y 2 2A 3 GND 4 8 VCC 7 1Y 6 3A 5 2Y 001aai257 Fig. 4. Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8) 6.2. Pin description Table 3. Pin description Symbol 1A, 2A, 3A GND 1Y, 2Y, 3Y VCC Pin 1, 3, 6 4 7, 5, 2 8 7. Functional description Table 4. Function table H = HIGH voltage level; L = LOW voltage level. Input nA L H Output nY H L Description data input ground (0 V) data output supply voltage 74HC_HCT3G04 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 26 November 2018 © Nexperia B.V. 2018. All rights reserved 2 / 12 Nexperia 74HC3G04; 74HCT3G04 Triple inverter 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VCC IIK IOK IO ICC IGND Tstg PD supply voltage input clamping current output clamping current output current supply current ground current storage temperature dynamic power dissipation VI < -0.5 V or VI > VCC + 0.5 V VO < -0.5 V or VO > VCC + 0.5 V VO = -0.5 V to (VCC + 0.5 V) Tamb = -40 °C to +125 °C -0.5 [1] [1] [1] [1] [1] -50 -65 [2] - +7.0 V ±20 mA ±20 mA 25 mA 50 mA - mA +150 °C 300 mW [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For TSSOP8 package:.


74HCT3G04DP 74HC3G04DC 74HCT3G04DC


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site.
(Privacy Policy & Contact)