74HC86D

74HC86; 74HCT86 Quad 2-input EXCLUSIVE-OR gate Rev. 6 — 13 September 2021 Product data sheet 1. General description The 74HC86; 74HCT86 is a quad 2-input EXCLUSIVE-OR gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits Wide supply voltage range from 2.0 V to 6.0 V CMOS low power dissipation High noise immunity Latch-up performance exceeds 100 mA per JESD 78 Class II Level B Complies with JEDEC standards: JESD8C (2.7 V to 3.6 V) JESD7A (2.0 V to 6.0 V) Input levels: For 74HC86: CMOS level For 74HCT86: TTL level ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Specified from -40 °C to +85 °C and from -40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range 74HC86D -40 °C to +125 °C 74HCT86D 74HC86PW -40 °C to +125 °C 74HCT86PW Name SO14 TSSOP14 Description plastic small outline package; 14 leads; body width 3.9 mm plastic thin shrink small outline package; 14 leads; body width 4.4 mm Version SOT108-1 SOT402-1 Nexperia 4. Functional diagram Fig. 1. Logic symbol A B Fig. 2. Logic diagram (one gate) 5. Pinning information 74HC86; 74HCT86 Quad 2-input EXCLUSIVE-OR gate 1 1A 2 1B 4 2A 5 2B 9 3A 10 3B 12 4A 13 4B 1Y 3 2Y 6 3Y 8 4Y 11 mna787 Y mna788 1 =1 3 2 4 =1 6 5 9 =1 8 10 12 =1 11 13 Fig. 3. IEC logic symbol mna786 5.1. Pinni...