18-bit registered driver
74ALVC162835A
18-bit registered driver with 30 Ω termination resistors;
3-state
Rev. 7 — 12 October 2017
Product dat...
Description
74ALVC162835A
18-bit registered driver with 30 Ω termination resistors;
3-state
Rev. 7 — 12 October 2017
Product data sheet
1 General description
The 74ALVC162835A is an 18-bit universal bus driver. Data flow is controlled by output enable (OE), latch enable (LE) and clock inputs (CP).
When LE is HIGH, the A to Y data flow is transparent. When LE is LOW and CP is held at LOW or HIGH, the data is latched; on the LOW to HIGH transient of CP the A-data is stored in the latch/flip-flop.
When OE is LOW the outputs are active. When OE is HIGH, the outputs go to the high impedance OFF-state. Operation of the OE input does not affect the state of the latch/ flip-flop.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The 74ALVC162835A is designed with 30 Ω series resistors in both HIGH or LOW output stages.
2 Features and benefits
Wide supply voltage range from 1.2 V to 3.6 V CMOS low-power consumption Direct interface with TTL levels Current drive ± 12 mA at 3.0 V MULTIBYTE flow-through standard pin-out architecture Low inductance multiple VCC and GND pins for minimum noise and ground bounce Output drive capability 50 Ω transmission lines at 85°C Integrated 30 Ω termination resistors Diode clamps to VCC and GND on all inputs Input diodes to accommodate strong drivers Complies with JEDEC sta...
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