Document
74AHCT595
8-BIT SHIFT REGISTER 8-BIT OUTPUT REGISTER
Description
The 74AHCT595 is an advanced high speed CMOS device that is designed to be pin compatable with 74LS low power Schottky types.
An eight bit shift register accepts data from the serial input (DS) on each positive transition of the shift register clock (STCP). When asserted low, the reset function (MR) sets all shift register values to zero and is independent of all clocks.
Data from the input serial shift register is placed in the output register with a rising pulse on the storages resister clock (SHCP). With the output enable (OE asserted low the 3-state outputs Q0-Q7 become active and present.
All registers capture data on rising edge and change output on the falling edge. If both clocks are connected together, the input shift register is always one clock cycle ahead of the output register.
Pin Assignments
Features
Supply Voltage Range from 4.5V to 5.5V Sinks or sources 8mA at VCC = 4.5V CMOS low power consumption Schmitt Trigger Action at All Inputs Inputs accept up to 5.5V ESD Protection Tested per JESD 22
Exceeds 200-V Machine Model (A115-A) Exceeds 2000-V Human Body Model (A114-A) Exceeds 1000-V Charged Device Model (C101C) Latch-Up Exceeds 250mA per JESD 78, Class II Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) Halogen and Antimony Free. “Green” Device (Note 3)
Applications
General Purpose Logic Serial to Parallel Data conversion Capture and hold data for extended periods of time. Allow simple serial bit streams from a microcontroller to control as
many peripheral lines as needed. Wide array of products such as:
Computer peripherals Appliances Industrial control
Notes:
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant. 2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green"
and Lead-free. 3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and
<1000ppm antimony compounds.
Click here for ordering information, located at the end of datasheet
74AHCT595
Document number: DS35487 Rev. 3 - 2
1 of 10 www.diodes.com
June 2013
© Diodes Incorporated
Pin Descriptions
Pin Number 1 2 3 4 5 6 7 8 9 10
11 12 13
14 15 16
Pin Name Q1 Q2 Q3 Q4 Q5 Q6 Q7 GND Q7S
MR SHCP STCP
OE DS Q0 Vcc
Description Parallel Data Output 1 Parallel Data Output 2 Parallel Data Output 3 Parallel Data Output 4 Parallel Data Output 5 Parallel Data Output 6 Parallel Data Output 7 Ground Serial Data Output Master Reset Input Shift Register Clock Input Storage Register Clock Input Output Enable Input Serial Data Input Parallel Data Output 0 Supply Voltage
Logic Diagram
Functional Diagram
74AHCT595
74AHCT595
Document number: DS35487 Rev. 3 - 2
2 of 10 www.diodes.com
June 2013
© Diodes Incorporated
74AHCT595
Functional Description and Timing Diagram
Control
Input
SHCP STCP OE MR
DS
Output
Q7S
Qn
X
X
L
L
L
NC
X
L
L
L
L
X
X
H
L
L
Z
X
L
H
Q6S
NC
X
L
H
L
H
NC Q6S
QnS QnS
Function
Low-level asserted on MR clears shift register. Storage register is unchanged Empty shift register transferred to storage register
Shift register remains clear;: All Q ouputs in Z state.
HIGH is shifted into first stage of Shift Register Contents of each register shifted to next register The content of Q6S has been shifted to Q7S and now appears on device pin Q7S Contents of shift register copied to storage register. With output now in active state the storage resister contents appear on Q outputs. Contents of shift register copied to output register then shift register shifted.
H=HIGH voltage state L=LOW voltage state =LOW to HIGH transition X= don’t care – high or low (not floating) NC= No change Z= high-impedance state
74AHCT595
Document number: DS35487 Rev. 3 - 2
3 of 10 www.diodes.com
June 2013
© Diodes Incorporated
74AHCT595
Absolute Maximum Ratings (Note 4) (@TA = +25°C, unless otherwise specified.)
Symbol
Description
Rating
ESD HBM
Human Body Model ESD Protection
2
ESD CDM
Charged Device Model ESD Protection
1
ESD MM
Machine Model ESD Protection
200
VCC VI Vo IIK IOK IOK IO ICC IGND TJ TSTG PTOT
Supply Voltage Range Input Voltage Range Voltage applied to output in high or low state Input Clamp Current VI < -0.5V Output Clamp Current VO <-0.5V Output Clamp Current VO > VCC +0.5V Continuous output current Continuous current through Vcc or GND Continuous current through Vcc or GND Operating Junction Temperature Storage Temperature Total Power Dissipation
-0.5 to +7.0 -0.5 to +7.0 -0.5 to VCC +0.5
-20 -20 20 ±25 75 -75 -40 to +150 -65 to +150 500
Notes: 4. Stresses beyond the absolute maximum may result in immediate failure or reduced reliab.