Document
MC33272A, MC33274A, NCV33272A, NCV33274A
Single Supply, High Slew Rate, Low Input Offset Voltage Operational Amplifiers
The MC33272/74 series of monolithic operational amplifiers are quality fabricated with innovative Bipolar design concepts. This dual and quad operational amplifier series incorporates Bipolar inputs along with a patented Zip−R−Trim element for input offset voltage reduction. The MC33272/74 series of operational amplifiers exhibits low input offset voltage and high gain bandwidth product. Dual−doublet frequency compensation is used to increase the slew rate while maintaining low input noise characteristics. Its all NPN output stage exhibits no deadband crossover distortion, large output voltage swing, and an excellent phase and gain margin. It also provides a low open loop high frequency output impedance with symmetrical source and sink AC frequency performance.
Features
• Input Offset Voltage Trimmed to 100 mV (Typ) • Low Input Bias Current: 300 nA • Low Input Offset Current: 3.0 nA • High Input Resistance: 16 MW • Low Noise: 18 nV/ √ Hz @ 1.0 kHz • High Gain Bandwidth Product: 24 MHz @ 100 kHz • High Slew Rate: 10 V/ms • Power Bandwidth: 160 kHz • Excellent Frequency Stability • Unity Gain Stable: w/Capacitance Loads to 500 pF • Large Output Voltage Swing: +14.1 V/ −14.6 V • Low Total Harmonic Distortion: 0.003% • Power Supply Drain Current: 2.15 mA per Amplifier • Single or Split Supply Operation: +3.0 V to +36 V or
±1.5 V to ±18 V
• ESD Diodes Provide Added Protection to the Inputs • NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable
• Pb−Free Packages are Available
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DUAL
8 1
PDIP−8 P SUFFIX CASE 626
8 1
SOIC−8 D SUFFIX CASE 751
x = A for MC33272AD/DR2 = N for NCV33272ADR2
MARKING DIAGRAMS 8
MC33272AP AWL
YYWWG
1 8 33272 ALYWx G 1
14 1
14
QUAD
14
PDIP−14
P SUFFIX
CASE 646
1
MC33274AP AWLYYWWG
14 1
SOIC−14 D SUFFIX CASE 751A
14
MC33274ADG AWLYWW
NCV33274AG AWLYWW
1
1
TSSOP−14
14
DTB SUFFIX
CASE 948G
1
14
MC33 274A ALYWG
G
14
NCV3 3274 ALYWG
G
1
1
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 11 of this data sheet.
© Semiconductor Components Industries, LLC, 2013
1
July, 2013 − Rev. 14
Publication Order Number: MC33272A/D
MC33272A, MC33274A, NCV33272A, NCV33274A
PIN CONNECTIONS
DUAL CASE 626/751
QUAD CASE 646/751A/948G
Output 1 1
Inputs 1
2+
3
VEE 4
8 VCC 7 Output 2
-6 +
Inputs 2
5
(Top View)
Output 1 1
2
Inputs 1
-
3 +1
VCC 4
Inputs 2
5 6
+ -2
Output 2 7
14 Output 4
13 4 + 12
Inputs 4
11 VEE
+ 10 3- 9
Inputs 3
8 Output 3
(Top View)
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Supply Voltage
VCC to VEE
+36
V
Input Differential Voltage Range
VIDR
Note 1
V
Input Voltage Range
VIR
Note 1
V
Output Short Circuit Duration (Note 2)
tSC
Indefinite
sec
Maximum Junction Temperature
TJ
+150
°C
Storage Temperature
Tstg
−60 to +150
°C
ESD Protection at Any Pin
− Human Body Model
Vesd
− Machine Model
V 2000 200
Maximum Power Dissipation Operating Temperature Range
PD
MC33272A, MC33274A
TA
NCV33272A, NCV33274A
Note 2
mW
−40 to +85
°C
−40 to +125
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Either or both input voltages should not exceed VCC or VEE. 2. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not exceeded (see Figure 2).
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MC33272A, MC33274A, NCV33272A, NCV33274A
DC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = −15 V, TA = 25°C, unless otherwise noted.)
Characteristics
Figure
Symbol
Min
Typ
Max
Input Offset Voltage (RS = 10 W, VCM = 0 V, VO = 0 V) (VCC = +15 V, VEE = −15 V) TA = +25°C TA = −40° to +85°C TA = −40° to +125°C (NCV33272A) TA = −40° to +125°C (NCV33274A) (VCC = 5.0 V, VEE = 0) TA = +25°C
3
|VIO|
−
0.1
1.0
−
−
1.8
−
−
2.5
−
−
3.5
−
−
2.0
Average Temperature Coefficient of Input Offset Voltage RS = 10 W, VCM = 0 V, VO = 0 V, TA = −40° to +125°C
3
DVIO/DT
−
2.0
−
Input Bias Current (VCM = 0 V, VO = 0 V) TA = +25°C TA = Tlow to Thigh
4, 5
IIB
−
300
650
−
−
800
Input Offset Current (VCM = 0 V, VO = 0 V) TA = +25°C TA = Tlow to Thigh
|IIO|
−
3.0
65
−
−
80
Common Mode Input Voltage Range (DVIO = 5.0 mV, VO = 0 V)
6
TA = +25°C
VICR
VEE to (VCC −1.8)
Large Signal Voltage Gain (VO = 0 V to 10 V,.