SOC driver. ST7701S Datasheet

ST7701S driver. Datasheet pdf. Equivalent


Sitronix ST7701S
ST7701S
Datasheet
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© 2013 Sitronix Technology Corporation. All rights reserved.
Preliminary Version 0.1
2016/12


ST7701S Datasheet
Recommendation ST7701S Datasheet
Part ST7701S
Description 16.7M-color System-on-Chip (SOC) driver
Feature ST7701S; ST7701S Datasheet Sitronix reserves the right to change the contents in this document without prior .
Manufacture Sitronix
Datasheet
Download ST7701S Datasheet




Sitronix ST7701S
LIST OF CONTENT
ST7701S
1 GENERAL DESCRIPTION................................................................................................................................... 8
2 FEATURES.............................................................................................................................................................. 9
3 PAD ARRANGEMENT ........................................................................................................................................ 11
3.1 OUTPUT BUMP DIMENSION............................................................................................................................. 11
3.2 INPUT BUMP DIMENSION ................................................................................................................................ 12
3.3 ALIGNMENT MARK DIMENSION ..................................................................................................................... 13
3.4 CHIP INFORMATION ........................................................................................................................................ 13
4 PAD CENTER COORDINATES (AFTER HEAT CORRECTION)................................................................ 14
5 BLOCK DIAGRAM ............................................................................................................................................. 35
6 PIN DESCRIPTION ............................................................................................................................................. 36
6.1 POWER SUPPLY PINS....................................................................................................................................... 36
6.2 BUS INTERFACE PINS ...................................................................................................................................... 37
6.3 DRIVER OUTPUT PINS..................................................................................................................................... 40
6.4 TEST AND OTHER PINS .................................................................................................................................... 40
7 DRIVER ELECTRICAL CHARACTERISTICS .............................................................................................. 42
7.1 ABSOLUTE OPERATION RANGE....................................................................................................................... 42
7.2 DC CHARACTERISTICS ................................................................................................................................... 43
7.3 DC CHARACTERISTICS ................................................................................................................................... 45
7.4 POWER CONSUMPTION ................................................................................................................................... 46
7.5 AC CHARACTERISTICS ................................................................................................................................... 47
7.5.1 Serial Interface Characteristics (3-line serial):........................................................................................ 47
7.5.2 Serial Interface Characteristics (4-line serial):........................................................................................ 48
7.5.3 RGB Interface Characteristics : ............................................................................................................... 49
7.5.4 MIPI Interface Characteristics:................................................................................................................ 50
7.5.4.1 High Speed Mode ................................................................................................................................. 50
7.5.4.2 Lowe Power Mode ............................................................................................................................... 51
7.5.4.3 DSI Bursts Mode .................................................................................................................................. 52
7.5.5 Reset Timing: ............................................................................................................................................ 54
8 FUNCTION DESCRIPTION............................................................................................................................... 56
8.1 SYSTEM INTERFACE........................................................................................................................................ 56
8.2 SERIAL INTERFACE ......................................................................................................................................... 57
8.2.1 Serial Interface (SPI) ................................................................................................................................ 58
8.2.1.1 Command write mode .......................................................................................................................... 58
Version 0.1
Page 2 of 306
2016/12
Sitronix Confidential The information contained herein is the exclusive property of Sitronix and shall not be distributed, reproduced, or
disclosed in whole or in part without prior written permission of Sitronix.



Sitronix ST7701S
ST7701S
8.2.2 Read function ............................................................................................................................................ 60
8.3 16 BIT SERIAL INTERFACE............................................................................................................................... 64
8.3.1 Write Mode................................................................................................................................................ 64
8.3.2 Read Mode ................................................................................................................................................ 66
8.4 DATA TRANSFER BREAK AND RECOVERY ....................................................................................................... 68
8.5 DATA TRANSFER PAUSE .................................................................................................................................. 70
8.5.1 SPI interface pause ................................................................................................................................... 71
8.6 RGB INTERFACE............................................................................................................................................. 72
8.6.1 RGB Color Format ................................................................................................................................... 73
8.6.2 RGB Interface Definition .......................................................................................................................... 74
8.6.3 RGB Interface Mode Selection.................................................................................................................. 75
8.6.4 RGB Interface Timing ............................................................................................................................... 75
8.7 MIPI-DSI INTERFACE ..................................................................................................................................... 77
8.7.1 Display Module Pin Configuration for DSI .............................................................................................. 78
8.7.2 Display Serial Interface (DSI) .................................................................................................................. 79
8.7.2.1 General description.............................................................................................................................. 79
8.7.2.2 Interface level communication ............................................................................................................. 79
8.7.2.2.1 General ................................................................................................................................................ 79
8.7.2.2.2 DSI-CLK Lanes .................................................................................................................................... 81
8.7.2.2.2.1 Low Power Mode (LPM) ................................................................................................................. 82
8.7.2.2.2.2 Ultra Low Power Mode (ULPM) .................................................................................................... 84
8.7.2.2.2.3 High-speed Clock Mode (HSCM).................................................................................................... 85
8.7.2.2.3 DSI-DATA LANES ................................................................................................................................ 87
8.7.2.2.3.1 GENERAL ....................................................................................................................................... 87
8.7.2.2.3.2 ESCAPE MODE .............................................................................................................................. 88
8.7.2.2.3.3 HIGH SPEED DATA TRANSMISSION (HSDT).............................................................................. 95
8.7.2.3 Packet Level Communication............................................................................................................. 100
8.7.2.3.1 Short Packet (SPA) And Long Packet (LPA) Structure ....................................................................... 100
8.7.2.3.1.1 Bit Order of the Byte on Packets ................................................................................................... 101
8.7.2.3.1.2 Bit Order of the Multiple Byte Information on Packets ................................................................. 101
8.7.2.3.1.3 Pack Header (PH) ......................................................................................................................... 102
8.7.2.3.1.4 Packet Data (PD) on the Long Packet (LPa) ................................................................................ 114
8.7.2.3.1.5 Packet Footer (PF) on the Long Packet (LPa).............................................................................. 114
8.7.2.3.2 Packet Transmissions ......................................................................................................................... 116
8.7.2.3.2.1 Packet from the MCU to the Display Module................................................................................ 116
8.7.2.3.2.2 PACKET FROM THE DISPLAY MODULE TO THE MCU .......................................................... 139
8.7.2.3.3 COMMUNICATION SEQUENCES ................................................................................................... 151
8.7.2.3.3.1 GENERAL ..................................................................................................................................... 151
Version 0.1
Page 3 of 306
2016/12
Sitronix Confidential The information contained herein is the exclusive property of Sitronix and shall not be distributed, reproduced, or
disclosed in whole or in part without prior written permission of Sitronix.







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