Bus Transceiver. TC7LX1104WBG Datasheet

TC7LX1104WBG Transceiver. Datasheet pdf. Equivalent


Toshiba TC7LX1104WBG
CMOS Digital Integrated Circuits Silicon Monolithic
TC7LX1104WBG
TC7LX1104WBG
1. Functional Description
• Low-Voltage, Low-Power 4-Bit Dual-Supply Bus Transceiver with Auto Direction Sensing
2. General
The TC7LX1104WBG is an advanced high-speed dual-supply 4-bit bus transceiver fabricated with silicon-gate
CMOS technology.
The TC7LX1104WBG is designed for use as an interface between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-
V voltage systems.
The voltage translator automatically senses the direction of data transmission, eliminating the need for a direction
control input. When the Output Enable (OE) input is low, the device is disabled, effectively isolating the buses.
All inputs and outputs of the TC7LX1104WBG can tolerate overvoltage conditions up to 3.6 V.
3. Features
(1) Voltage translation between arbitrary voltage levels from 1.2 V to 3.6 V.
(2) High-speed operation: tpd = 5.7 ns (max) (VCCA = 1.8 ± 0.15 V, VCCB = 3.3 ± 0.3 V)
(3) Latch-up performance: ±300 mA
(4) ESD performance:
Machine model ≥ ±200 V, Human body model ≥ ±2000 V
(5) Ultra-small package: WCSP12
(6) The A-bus and B-bus are allowed to float. (when OE = Low)
(7) 3.6-V tolerant function and power-down protection provided on all inputs and outputs.
(8) All output ports are disabled when either VCC is switched off (VCCA/B=0V)
1
2011-06-20
Rev.6.0


TC7LX1104WBG Datasheet
Recommendation TC7LX1104WBG Datasheet
Part TC7LX1104WBG
Description 4-Bit Dual-Supply Bus Transceiver
Feature TC7LX1104WBG; CMOS Digital Integrated Circuits Silicon Monolithic TC7LX1104WBG TC7LX1104WBG 1. Functional Descri.
Manufacture Toshiba
Datasheet
Download TC7LX1104WBG Datasheet




Toshiba TC7LX1104WBG
4. Packaging and Pin Assignment (Top View)
TC7LX1104WBG
S-WFBGA12-0202-0.40A01
4.1. Pin Assignment
Pin No.
A1
B1
C1
D1
A2
B2
C2
D2
A3
B3
C3
D3
5. Marking
Pin Name
B1
B2
B3
B4
VCCB
VCCA
OE
GND
A1
A2
A3
A4
Fig. 5.1 Marking
2
2011-06-20
Rev.6.0



Toshiba TC7LX1104WBG
6. Block Diagram
TC7LX1104WBG
Fig. 6.1 Block Diagram
7. Internal Equivalent Circuit
The TC7LX1104WBG does not have a control signal that controls the direction of data flow between A and B. In
a DC state, the output circuit holds either High or Low level, but since it is designed to have a weak drive strength
(with a typical output resistance of 5.5 k), an overdrive signal from the external driver can change the direction
of data flow.
The output one-shot circuits detect either a rising or falling edge on the A or B port. During the rise time, the
output one-shot circuit associated with the PMOS transistors turns it on for a certain period to speed up a
transition from Low to High. Likewise, during the fall time, the output one-shot circuit associated with the NMOS
transistors turns it on to speed up a transition from High to Low.
Fig. 7.1 Internal Equivalent Circuit
8. Principle of Operation
8.1. Truth Table
Input
OE
H
L
Function
A port = B port
Disconnect
3
2011-06-20
Rev.6.0







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