TC7PCI3215MT

TC7PCI3212MT,TC7PCI3215MT CMOS Digital Integrated Circuits Silicon Monolithic TC7PCI3212MT,TC7PCI3215MT 1. Functional Description 2 Differential Channel, 2:1 multiplexer/demultiplexer switch for PCI Express Gen3 2. General The TC7PCI3212MT and TC7PCI3215MT are 2 differential channel, 1-2 multiplexer/demultiplexer for PCI Express Gen3 (8Gbps), or other high-speed interface applications. The An+/An- inputs is connected to the Bn+/Bn- or Cn+/Cn- outputs determined by the combination both the select input (SEL) and output enable (OE). When the output enable (OE) input is held high-level, the switches are open (high-impedance state) with regardless the state of select inputs and reducing consumption current. All inputs are equipped with protection circuits against static discharge. 3. Features (1) Operating voltage: VCC = 3.0 to 3.6 V (2) Switch terminal ON-capacitance: CI/O = 1.5 pF Switch On (typ.) @VCC = 3.3 V (3) ON resistance: RON = 7.5 Ω (typ.) @VCC = 3.0 V, VIS = 0 V (4) -3dB Bandwidth: BW = 11.5 GHz (typ.) @ VCC = 3.3 V (5) Insertion Loss: DDIL = -1 dB (typ.) @ VCC = 3.3 V, f = 4 GHz (6) Off Isolation: DDOIRR = -20 dB (typ.) @ VCC = 3.3 V, f = 4 GHz (7) Crosstalk: DDNEXT = -40 dB (typ.) @ VCC = 3.3 V, f = 4 GHz (8) ESD performance: Machine model ≥ ±200 V, Human body model ≥ ±2000 V (9) Package: TQFN20 4. Packaging TQFN20 5. Marking TC7PCI3212MT TC7PCI3215MT 1 2013-08-09 Rev.2.0 6. Pin Assignment TC7PCI3212MT TC7PCI3212MT,TC7PCI3215MT TC7PCI3215MT 7. Block Diagram...