Low-voltage CMOS quad bus buffer
74LCX125
Low-voltage CMOS quad bus buffer (3-state) with 5 V tolerant inputs and outputs
Datasheet −production data
Fe...
Description
74LCX125
Low-voltage CMOS quad bus buffer (3-state) with 5 V tolerant inputs and outputs
Datasheet −production data
Features
■ 5 V tolerant inputs and outputs ■ High speed
– tPD = 5.2 ns (max.) at VCC = 3 V ■ Power-down protection on inputs and outputs ■ Symmetrical output impedance
– |IOH| = IOL = 24 mA (min.) at VCC = 3 V ■ PCI bus levels guaranteed at 24 mA ■ Balanced propagation delay
– tPLH ≅ tPHL ■ Operating voltage range
– VCC (opr.) = 2.0 V to 3.6 V ■ Pin and function compatible with 74 series 125 ■ Latch-up performance exceeds 500 mA
(JESD 17) ■ ESD performance
– HBM: 2000 V (MIL STD 883 method 3015) – MM: 200 V – CDM: 1000 V
Applications
■ Automotive ■ Industrial ■ Computer ■ Consumer
TSSOP14
SO-14
Description
The 74LCX125 device is a low-voltage CMOS quad bus buffer manufactured with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low-power and highspeed 3.3 V applications and can be interfaced to a 5 V signal environment for both inputs and outputs.
The device requires the 3-state control input G to be set high to place the output in the high impedance state.
It has the same speed performance at 3.3 V as the 5 V AC/ACT family, combined with lower power consumption.
All inputs and outputs are equipped with protection circuits against static discharge, giving them 2 kV ESD immunity and transient excess voltage.
Table 1. Device summary
Order code
Temperature range
Package
Packaging
Marking
74LCX125TTR 74LCX125YTTR(1...
Similar Datasheet