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TC7USB40FT Dataheets PDF



Part Number TC7USB40FT
Manufacturers Toshiba
Logo Toshiba
Description Dual SPDT USB Switch
Datasheet TC7USB40FT DatasheetTC7USB40FT Datasheet (PDF)

CMOS Digital Integrated Circuits Silicon Monolithic TC7USB40FT TC7USB40FT 1. Functional Description • Dual SPDT USB Switch 2. General The TC7USB40FT is high-speed CMOS dual 1-2 multiplexer/demultiplexer. The low ON-resistance and the low capacitance of the switch allow connections to USB2.0 (480Mbps) application. This device consists of dual individual two-inputs multiplexer/demultiplexer with common select input (S) and output enable (OE). The D+/D- inputs is connected to the 1D+/1D- or 2D+/2.

  TC7USB40FT   TC7USB40FT


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CMOS Digital Integrated Circuits Silicon Monolithic TC7USB40FT TC7USB40FT 1. Functional Description • Dual SPDT USB Switch 2. General The TC7USB40FT is high-speed CMOS dual 1-2 multiplexer/demultiplexer. The low ON-resistance and the low capacitance of the switch allow connections to USB2.0 (480Mbps) application. This device consists of dual individual two-inputs multiplexer/demultiplexer with common select input (S) and output enable (OE). The D+/D- inputs is connected to the 1D+/1D- or 2D+/2D- outputs determined by the combination both the select input (S) and output enable (OE). When the output enable (OE) input is held high level, the switches are open with regardless the state of select inputs and a high-impedance state exists between the switches. All inputs are equipped with protection circuits against static discharge. 3. Features (1) Supply voltage: VCC = 2.3 to 4.3 V (2) Switch terminal ON-capacitance: CI/O = 5 pF Switch ON (typ.) @VCC = 3.3 V (3) ON-resistance: RON = 4.5 Ω (typ.) @VCC = 3 V, VIS = 0 V (4) RON flatness: RON(flat) = 1.3 Ω (typ.)@VCC = 3 V (5) Difference of ON-resistance between switches: ∆RON = 0.35 Ω (typ.)@VCC = 3 V (6) ESD performance: Machine model ≥ ±200 V, Human body model ≥ ±8000 V (7) Power-down protection provided on all inputs and outputs. (8) Package: TSSOP14 4. Packaging and Pin Assignment TSSOP14 1 2013-02-05 Rev.2.0 5. Marking TC7USB40FT 6. Block Diagram Fig. 5.1 Marking (Top view) Fig. 6.1 Block Diagram 7. Principle of Operation 7.1. Truth Table Input OE Input S L L L H H X X: Don't care Function D+ port = 1D+ port, D- Port = 1D- Port D+ port = 2D+ port, D- Port = 2D- Port Disconnect 2 2013-02-05 Rev.2.0 8. Absolute Maximum Ratings (Note) TC7USB40FT Characteristics Symbol Note Test Condition Rating Unit Supply voltage Input voltage (OE, S) Switch I/O voltage VCC  VIN -0.5 to 4.6 V -0.5 to 4.6 VS VCC = 0 V or Switch OFF -0.5 to 4.6 Switch ON 0.5 to VCC +0.5 Clamp diode current IIK Control input Switch -50 mA ±50 Switch I/O current IS  50 Power dissipation PD 200 mW VCC/ground current ICC/IGND ±100 mA Storage temperature Tstg -65 to 150  Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). 9. Operating Ranges (Note) Characteristics Symbol Note Test Condition Rating Unit Supply voltage Input voltage (OE, S) Switch I/O voltage Operating temperature Input rise time VCC VIN VS Topr dt/dv  VCC = 0 V or Switch OFF Switch ON  2.3 to 4.3 0 to 4.3 0 to 4.3 0 to VCC -40 to 85 0 to 10 V  ns/V Input fall time 0 to 10 Note: The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs and bus inputs must be tied to either VCC or GND. 3 2013-02-05 Rev.2.0 TC7USB40FT 10. Electrical Characteristics 10.1. DC Characteristics (Note) (Unless otherwise specified, Ta = -40 to 85) Characteristics Symbol Note Test Condition VCC (V) Min Typ. Max Unit High-level input voltage (OE, S) VIH Low-level input voltage (OE, S) VIL Input leakage current (OE, S) IIN Power-OFF leakage current IOFF   VIN = 0 to 4.3 V VIN = VIS = 0 to 4.3 V, See Fig. 11.10 2.3 to 3.0 0.50 ×   V VCC 3.0 to 4.3 0.46 ×   VCC 2.3 to 4.3   0.25 × VCC 2.3 to 4.3   ±1 µA 0   ±2 Switch OFF-state leakage ISZ current VIS = 0 to 3.6V, OE = VCC, 2.3 to 4.3   ±2 See Fig. 11.11 ON-resistance RON (Note 1) VIS = 0 V, IIS = 30 mA, See Fig. 11.9 3.0  4.5 6 Ω VIS = 0.4 V, IIS = 30 mA, See Fig. 11.9 3.0  4.8 6.7 VIS = 3.0 V, IIS = 30 mA, See Fig. 11.9 3.0  10 14 Difference of ON-resistance between switches ON-resistance flatness Quiescent supply current ∆RON (Note 1) VIS = 0.4 V, 1.0 V, IIS = 30 mA RON(flat) (Note 1) VIS = 0 V to 1.0 V, IIS = 30 mA ICC VIN = VCC or GND, IOUT = 0 A ∆ICC VIN = 2.6 V (one input) 3.0  0.35  3.0  1.3  4.3   1 µA 4.3   40 Note: All typical values are at Ta = 25. Note 1: Measured by the voltage drop between D+/D- and 1D+/1D-,2D+/2D- pins at the indicated current through the switch. On-resistance is determined by the lower of the voltages on the two pins. 10.2. AC Characteristics (Note) (Unless otherwi.


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