Document
Semiconductor
July 1998
IRF9540, IRF9541, IRF9542, IRF9543, RF1S9540, RF1S9540SM
-15A and -19A, -80V and -100V, 0.20 and 0.30 Ohm, P-Channel Power MOSFETs
Features
Description
• -15A and -19A, -80V and -100V • rDS(ON) = 0.20Ω and 0.30Ω • Single Pulse Avalanche Energy Rated • SOA is Power Dissipation Limited • Nanosecond Switching Speeds • Linear Transfer Characteristics • High Input Impedance • Related Literature
- TB334 “Guidelines for Soldering Surface Mount Components to PC Boards”
Ordering Information
PART NUMBER
PACKAGE
BRAND
These are P-Channel enhancement mode silicon gate power field effect transistors. They are advanced power MOSFETs designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. They can be operated directly from integrated circuits.
Formerly Developmental Type TA17521.
Symbol
D
IRF9540 IRF9541 IRF9542
TO-220AB TO-220AB TO-220AB
IRF9540 IRF9541 IRF9542
G S
IRF9543
TO-220AB
IRF9543
RF1S9540
TO-262AA
RF1S9540
RF1S9540SM
TO-263AB
RF1S9540
NOTE: When ordering, use the entire part number. Add the suffix 9A to obtain the TO-263AB variant in the tape and reel, i.e., RF1S9540SM9A.
Packaging
JEDEC TO-220AB
DRAIN (FLANGE)
SOURCE DRAIN GATE
JEDEC TO-262AA
DRAIN (FLANGE)
SOURCE DRAIN GATE
JEDEC TO-263AB
GATE SOURCE
DRAIN (FLANGE)
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures.
Copyright © Harris Corporation 1998
1
File Number 2282.4
IRF9540, IRF9541, IRF9542, IRF9543, RF1S9540, RF1S9540SM
Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified
IRF9540, RF1S9540,
RF1S9540SM
IRF9541
IRF9542
IRF9543 UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . .VDS
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . VDGR
Continuous Drain Current. . . TC = 100oC . . . . . . . . . . . .
........ ........
... ...
... ...
......... .........
ID ID
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . IDM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . .VGS
Maximum Power Dissipation (Figure 1) . . . . . . . . . . . . . . . PD
Linear Derating Factor (Figure 1) . . . . . . . . . . . . . . . . . . . . . .
-100 -100 -19 -12 -76 ±20 150
1
-80
-100
-80
V
-80
-100
-80
V
-19
-15
-15
A
-12
-10
-10
A
-76
-60
-60
A
±20
±20
±20
V
150
150
150
W
1
1
1
W/oC
Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . EAS Operating and Storage Temperature . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . Tpkg
960 -55 to 175
300 260
960
960
960
mJ
-55 to 175 -55 to 175 -55 to 175
oC
300
300
300
oC
260
260
260
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. TJ = 25oC to 150oC.
Electrical Specifications TC = 25oC, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
Drain to Source Breakdown Voltage
IRF9540, IRF9542, RF1S9540, RF1S9540SM
BVDSS ID = -250µA, VGS = 0V (Figure 10)
-100
IRF9541, IRF9543
-80
Gate to Threshold Voltage Zero Gate Voltage Drain Current
On-State Drain Current (Note 2) IRF9540, IRF9541, RF1S9540, RF1S9540SM
VGS(TH) VGS = VDS, ID = -250µA
-2
IDSS VDS = Rated BVDSS, VGS = 0V
-
VTCDS==1205.8oCx Rated BVDSS, VGS = 0V
-
ID(ON) VDS > ID(ON) x rDS(ON) MAX, VGS = -10V -19
IRF9542, IRF9543
-15
Gate to Source Leakage Current
IGSS VGS = ±20V
-
Drain to Source On Resistance (Note 2) rDS(ON) ID = -10A, VGS = -10V
IRF9540, IRF9541,
(Figures 8, 9)
-
RF1S9540, RF1S9540SM
IRF9542, IRF9543
-
Forward Transconductance (Note 2)
gfs
VDS > ID(ON) x rDS(ON) MAX, ID = -6A
5
(Figure 12)
Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge (Gate to Source + Gate to Drain) Gate to Source Charge Gate to Drain “Miller” Charge
td(ON) VDD = -50V, ID ≈19A, RG = 9.1Ω, RL = 2.3Ω,
-
tr
VGS = -10V, (Figures 17, 18) MOSFET Switching Times are Essentially
-
td(OFF) Independent of Operating Temperature
-
tf
-
Qg(TOT) VGS = -10V, ID = -19A, VDS = 0.8 x Rated BVDSS, -
Ig(REF) = -1.5mA (Figures 14, 19, 20)
Gate Charge is Essentially Independent of
Qgs
Operating Temperature
-
Qgd
-
TYP MAX UNITS
-
-
V
-
-
V
-
-4
V
-
-25 µA
- -250 µA
-
-
A
-
-
A
- ±100 nA
0.1.