10-LINE DECODERS. SNJ54HC42W Datasheet

SNJ54HC42W DECODERS. Datasheet pdf. Equivalent

SNJ54HC42W Datasheet
Recommendation SNJ54HC42W Datasheet
Part SNJ54HC42W
Description 4-LINE TO 10-LINE DECODERS
Feature SNJ54HC42W; D Wide Operating Voltage Range of 2 V to 6 V D Outputs Can Drive Up To 10 LSTTL Loads D Low Power Co.
Manufacture etcTI
Datasheet
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Texas Instruments SNJ54HC42W
D Wide Operating Voltage Range of 2 V to 6 V
D Outputs Can Drive Up To 10 LSTTL Loads
D Low Power Consumption, 80-µA Max ICC
D Typical tpd = 14 ns
D ±4-mA Output Drive at 5 V
SN54HC42 . . . J OR W PACKAGE
SN74HC42 . . . D, N, OR NS PACKAGE
(TOP VIEW)
01
12
23
34
45
56
67
GND 8
16 VCC
15 A
14 B
13 C
12 D
11 9
10 8
97
SN54HC42, SN74HC42
4ĆLINE TO 10ĆLINE DECODERS (1 of 10)
SCLS091D − DECEMBER 1982 − REVISED SEPTEMBER 2003
D Low Input Current of 1 µA Max
D Full Decoding of Input Logic
D All Outputs Are High for Invalid BCD
Conditions
D Also for Applications as 3-Line to 8-Line
Decoders
SN54HC42 . . . FK PACKAGE
(TOP VIEW)
2
3 2 1 20 19
4
18
B
35
17 C
NC 6
16 NC
47
15 D
58
14 9
9 10 11 12 13
NC − No internal connection
description/ordering information
These decimal decoders consist of eight inverters and ten 4-input NAND gates. The inverters are connected
in pairs to make BCD input data available for decoding by the NAND gates. Full decoding of valid input logic
ensures that all inputs remain off for all invalid input conditions.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP − N
Tube of 25
SN74HC42N
SN74HC42N
Tube of 40
SN74HC42D
−40°C to 85°C SOIC − D
Reel of 2500
Reel of 250
SN74HC42DR
SN74HC42DT
HC42
SOP − NS
Reel of 2000 SN74HC42NSR
HC42
CDIP − J
Tube of 25
SNJ54HC42J
SNJ54HC42J
−55°C to 125°C CFP − W
Tube of 150
SNJ54HC42W
SNJ54HC42W
LCCC − FK
Tube of 55
SNJ54HC42FK
SNJ54HC42FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 2003, Texas Instruments Incorporated
On products compliant to MILĆPRFĆ38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
1



Texas Instruments SNJ54HC42W
SN54HC42, SN74HC42
4ĆLINE TO 10ĆLINE DECODERS (1 of 10)
SCLS091D − DECEMBER 1982 − REVISED SEPTEMBER 2003
FUNCTION TABLE
INPUTS
OUTPUTS
NO.
D
C
B
A
0
1
2
3
4
5
6
7
8
9
0
L
L
L
L
L
H
H
H
H
H
H
H
H
H
1
L
L
L
H
H
L
H
H
H
H
H
H
H
H
2
L
L
H
L
H
H
L
H
H
H
H
H
H
H
3
L
L
H
H
H
H
H
L
H
H
H
H
H
H
4
L
H
L
L
H
H
H
H
L
H
H
H
H
H
5
L
H
L
H
H
H
H
H
H
L
H
H
H
H
6
L
H
H
L
H
H
H
H
H
H
L
H
H
H
7
L
H
H
H
H
H
H
H
H
H
H
L
H
H
8
H
L
L
L
H
H
H
H
H
H
H
H
L
H
9
H
L
L
H
H
H
H
H
H
H
H
H
H
L
H
L
H
L
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
H
H
H
H
H
H
H
H
H
H
Invalid
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265



Texas Instruments SNJ54HC42W
logic diagram (positive logic)
15
A
SN54HC42, SN74HC42
4ĆLINE TO 10ĆLINE DECODERS (1 of 10)
SCLS091D − DECEMBER 1982 − REVISED SEPTEMBER 2003
1
0
2
1
3
2
14
B
4
3
5
4
13
C
6
5
7
6
12
D
9
7
10
8
Pin numbers shown are for the D, J, N, NS, and W packages.
11
9
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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