Radio Transceiver. LT8900SSK Datasheet

LT8900SSK Transceiver. Datasheet pdf. Equivalent

LT8900SSK Datasheet
Recommendation LT8900SSK Datasheet
Part LT8900SSK
Description Low Cost 2.4GHz Radio Transceiver
Feature LT8900SSK; LT8900 Datasheet Revision 1.2 LT8900 Low Cost 2.4GHz Radio Transceiver FEATURES GENERAL DESCRIPT.
Manufacture ETC
Datasheet
Download LT8900SSK Datasheet




ETC LT8900SSK
LT8900 Datasheet Revision 1.2
LT8900
Low Cost 2.4GHz Radio Transceiver
FEATURES
GENERAL DESCRIPTION
z Complete 2.4 GHz radio transceiver includes
fully integrated RF PLL and channel filtering
z Supports Frequency-Hopping Spread
Spectrum
z Supports SPI and I2C bus interface
z Built-in smart auto-acknowledge Tx/Rx
protocol simplifies usage
z Packet data rate 1 Mbps over-the-air
z FIFO flag signal permits continuous streaming
data at 1 Mbps over-the-air
z Power management for minimizing current
consumption
z Digital readout of RSSI and temperature
z Lead-free 4x4mm QFN Package & SOP16
for best RF performance
Application
z Remote controls
z Wireless keyboards and mice
z Proprietary Wireless Networks
z Home automation
z Commercial and industrial short-range
wireless
z Wireless voice, VoIP, Cordless headsets
z Robotics and machine connectivity
The LT8900 is a low-cost, fully
integrated CMOS RF transceiver, GFSK data
modem, and packet framer, optimized for use in the 2.4
GHz ISM band. It contains transmit, receive, RF
synthesizer, and digital modem functions, with few
external components. The transmitter supports digital
power control. The receiver utilizes extensive digital
processing for excellent overall performance, even in
the presence of interference and transmitter
impairments.
The LT8900 transmits GFSK data at approximately 1
dBm output power. The low-IF receiver architecture
produces good selectivity, with sensitivity down to
approx. -87 dBm. Digital RSSI values are available to
monitor channel quality.
On-chip transmit and receive FIFO registers are
available to buffer the data transfer with MCU.
Over-the-air data rate is always 1 Mbps even
when connected to a slow, low-cost MCU.
Built-in CRC, FEC, data whitening, and automatic
retry/acknowledge are all available to simplify and
optimize performance for individual applications.
The digital baseband interface can be either 4-wire SPI
or 2-wire I2C-bus. Three additional pins are available
for optional reset and buffer control.
For extended battery life, power consumption is
minimized all key areas. A sleep mode is available to
reduce standby current consumption to just 1 uA
typ. while preserving register settings.
This product is available in RoHS compliant 24-lead
4x4 mm JEDEC standard QFN package, featuring an
exposed pad on the bottom for best RF characteristics.
Also available in bare die form.
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ETC LT8900SSK
1. Block Diagram
LT8900 Datasheet Revision 1.2
Page 2
December
2010
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ETC LT8900SSK
2. Absolute Maximum Ratings
LT8900 Datasheet Revision 1.2
Table 1. Absolute Maximum Rating
Parameter
Operating Temp.
Storage Temp.
LDO_VDD, VDD_IO Voltage
VDD pins
Applied Voltages to
Other Pins
Input RF Level
Output Load mismatch (Z0=50)
Symbol
TOP
TSTORAGE
VIN_MAX
VDD_MAX
VOTHER
PIN
VSWROUT
MIN TYP MAX
-40
+85
-55
+125
+3.7
+2.5
-0.3
+3.7
+10
10:1
Unit
ºC
ºC
VDC
VDC
dBm
VSWR
Notes:
1. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Recommended operating conditions
indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For
guaranteed specifications and test conditions, see the Electrical Characteristics section below.
2. These devices are electro-static sensitive. Devices should be transported and stored in anti-static containers. Equipment and
personnel contacting the devices need to be properly grounded. Cover workbenches with grounded conductive mats.
Page 3
December
2010
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