CD74HCT393

Semiconductor September 1997 CD74HC393, CD74HCT393 High Speed CMOS Logic Dual 4 -Stage Binary Counter Features Description Fully Static Operation Buffered Inputs Common Reset Negative-Edge Clocking TTAyp=ic2a5lofCMAX = 60 MHz at VCC = 5V, CL = 15pF, Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads Wide Operating Temperature Range . . . -55oC to 125oC Balanced Propagation Delay and Transition Times Significant Power Reduction Compared to LSTTL Logic ICs HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30%of VCC at VCC = 5V HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH The Harris CD74HC393 and CD74HCT393 are 4-stage ripple-carry binary counters. Al counter stages are masterslave flip-flops. The state of the stage advances one count on the negative transition of each clock pulse; a high voltage level on the MR line resets all counters to their zero state. All inputs and outputs are buffered. Ordering Information PART NUMBER TEMP. RANGE (oC) PACKAGE PKG. NO. CD74HC393E -55 to 125 14 Ld PDIP E14.3 CD74HCT393E -55 to 125 14 Ld PDIP E14.3 CD74HC393M -55 to 125 14 Ld SOIC M14.15 CD74HCT393M -55 to 125 14 Ld SOIC M14.15 NOTES: 1. When ordering, use the entire part number. Add the suffix 96 to obtain the varian...