8-Input NAND Gate
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SCHS121E – AUGUSTCC1DD9977744–HHRCCE33VI00S,,ECCDDDAP55R44IHHL CC20332001
SCHS121E – AUGUST 1997 – REVISED A...
Description
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SCHS121E – AUGUSTCC1DD9977744–HHRCCE33VI00S,,ECCDDDAP55R44IHHL CC20332001
SCHS121E – AUGUST 1997 – REVISED APRIL 2021
CDx4HC30 Single 8-Input NAND Gate
1 Features
Buffered inputs Wide operating voltage range: 2 V to 6 V Wide operating temperature range:
–55°C to +125°C Supports fanout up to 10 LSTTL loads Significant power reduction compared to LSTTL
logic ICs
2 Applications
Alarm / tamper detect circuit S-R latch
3 Description
This device contains one independent 8-input NAND gate. Each gate performs the Boolean function Y = A ● B ● C ● D ● E ● F ● G ● H in positive logic.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
CD74HC30M
SOIC (14)
8.70 mm × 3.90 mm
CD74HC30E
PDIP (14)
19.30 mm × 6.40 mm
CD74HC30NS
SO (14)
10.20 mm × 5.30 mm
CD74HC30PW
TSSOP (14) 5.00 mm × 4.40 mm
CD54HC30F
CDIP (14)
21.30 mm × 7.60 mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
1 A
2 B
3 C
4 D
5 E
6 F
7 GND
14 VCC
13 NC
12 H
11 G
10 NC
9 NC
8 Y
Functional pinout
CopyrighAtn©I2M0P21OTReTxaAsNInTsNtruOmTeInCtsEInactotrhpeoreatnedd of this data sheet addresses availability, warranty, changes, use iSnusbamfeittyD-corcituicmael anpt pFleiceadtbioancsk,
1
intellectual property matters and other important disclaimers. PRODUCTION DATA.
Product Folder Links: CD74HC30 CD54HC30
CD74HC30, CD54HC30
SCHS121E – AUGUST 1997 – REVISED APRIL 2021
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Table of Contents
1 Features.......................
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