Quad 2-Input OR Gate
Data sheet acquired from Harris Semiconductor SCHS274C
September 1997 - Revised September 2003
CD54HC32, CD74HC32, CD54...
Description
Data sheet acquired from Harris Semiconductor SCHS274C
September 1997 - Revised September 2003
CD54HC32, CD74HC32, CD54HCT32, CD74HCT32
High-Speed CMOS Logic Quad 2-Input OR Gate
[ /Title (CD54 HCT32 , CD74 HC32, CD74 HCT32 ) /Subject (High
Features
Description
Typical Propagation Delay: CL = 15pF, TA = 25oC
7ns
at
VCC
=
5V,
Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
Wide Operating Temperature Range . . . -55oC to 125oC
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL Logic ICs
HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH
The ’HC32 and ’HCT32 contain four 2-input OR gates in one package. Logic gates utilize silicon gate CMOS technology to achieve operating speeds similar to LSTTL gates with the low power consumption of standard CMOS integrated circuits. All devices have the ability to drive 10 LSTTL loads. The HCT logic family is functionally pin compatible with the standard LS logic family.
Ordering Information
PART NUMBER CD54HC32F3A CD54HCT32F3A CD74HC32E CD74HC32M CD74HC32MT CD74HC32M96 CD74HCT32E
TEMP. RANGE (oC)
PACKAGE
-55 to 125
14 Ld CERDIP
-55 to 125
14 Ld CERDIP
-55...
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