ADC12DL080

ADC12DL080 www.ti.com SNAS345A – FEBRUARY 2006 – REVISED APRIL 2013 ADC12DL080 Dual 12-Bit, 80 MSPS, A/D Converter for IF Sampling Check for Samples: ADC12DL080 FEATURES 1 2 Single +3.3V Supply Operation Internal Sample-and-Hold Internal or External Reference Outputs 2.4V to 3.6V Compatible Power Down Mode Duty Cycle Stabilizer Pin Compatible with ADC12DL040, ADC12DL065, ADC12DL066 APPLICATIONS Instrumentation Communications Receivers Sonar/Radar xDSL, Cable Modems KEY SPECIFICATIONS Resolution: 12 Bits Max Conversion Rate: 80 MSPS DNL: ±0.4 LSB (typ) SNR (fIN=40MHz): 69 dB (typ) SNR (fIN=200MHz): 67 dB(typ) SFDR (fIN=40MHz): 82 dB (typ) SFDR (fIN=200MHz): 81 dB (typ) Power Consumption – Operating: 447 mW (typ) – Power Down Mode: 50 mW (typ) DESCRIPTION The ADC12DL080 is a dual, low power monolithic CMOS analog-to-digital converter capable of converting analog input signals into 12-bit digital words at 80 Megasamples per second (MSPS). This converter uses a differential, pipeline architecture with digital error correction and an on-chip sample-andhold circuit to minimize power consumption while providing excellent dynamic performance and a 600 MHz Full Power Bandwidth. Operating on a single +3.3V power supply, the ADC12DL080 achieves 11.0 effective bits at Nyquist and consumes just 447mW at 80 MSPS. The Power Down feature reduces power consumption to 50 mW. The differential inputs provide a full scale differential input swing equal to...