Operational Amplifier. LMC660AIN Datasheet

LMC660AIN Amplifier. Datasheet pdf. Equivalent

LMC660AIN Datasheet
Recommendation LMC660AIN Datasheet
Part LMC660AIN
Description CMOS Quad Operational Amplifier
Feature LMC660AIN; LMC660 www.ti.com SNOSBZ3D – APRIL 1998 – REVISED MARCH 2013 LMC660 CMOS Quad Operational Amplifi.
Manufacture etcTI
Datasheet
Download LMC660AIN Datasheet




Texas Instruments LMC660AIN
LMC660
www.ti.com
SNOSBZ3D – APRIL 1998 – REVISED MARCH 2013
LMC660 CMOS Quad Operational Amplifier
Check for Samples: LMC660
FEATURES
1
2 Rail-to-Rail Output Swing
• Specified for 2 kΩ and 600Ω Loads
• High Voltage Gain: 126 dB
• Low Input Offset Voltage: 3 mV
• Low Offset Voltage Drift: 1.3 μV/°C
• Ultra Low Input Bias Current: 2 fA
• Input Common-Mode Range Includes V
• Operating Range from +5V to +15.5V Supply
• ISS = 375 μA/Amplifier; Independent of V+
• Low Distortion: 0.01% at 10 kHz
• Slew Rate: 1.1 V/μs
APPLICATIONS
• High-Impedance Buffer or Preamplifier
• Precision Current-to-Voltage Converter
• Long-Term Integrator
• Sample-and-Hold Circuit
• Peak Detector
• Medical Instrumentation
• Industrial Controls
• Automotive Sensors
DESCRIPTION
The LMC660 CMOS Quad operational amplifier is
ideal for operation from a single supply. It operates
from +5V to +15.5V and features rail-to-rail output
swing in addition to an input common-mode range
that includes ground. Performance limitations that
have plagued CMOS amplifiers in the past are not a
problem with this design. Input VOS, drift, and
broadband noise as well as voltage gain into realistic
loads (2 kΩ and 600Ω) are all equal to or better than
widely accepted bipolar equivalents.
This chip is built with TI's advanced Double-Poly
Silicon-Gate CMOS process.
See the LMC662 datasheet for a dual CMOS
operational amplifier with these same features.
Connection Diagrams
Figure 1. 14-Pin SOIC/PDIP
Figure 2. LMC660 Circuit Topology (Each
Amplifier)
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1998–2013, Texas Instruments Incorporated



Texas Instruments LMC660AIN
LMC660
SNOSBZ3D – APRIL 1998 – REVISED MARCH 2013
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings(1)
Differential Input Voltage
Supply Voltage
Output Short Circuit to V+
Output Short Circuit to V
Lead Temperature (Soldering, 10 sec.)
Storage Temp. Range
Voltage at Input/Output Pins
Current at Output Pin
Current at Input Pin
Current at Power Supply Pin
Power Dissipation
Junction Temperature
ESD tolerance(5)
±Supply Voltage
16V
See (2)
See (3)
260°C
65°C to +150°C
(V+) + 0.3V, (V) 0.3V
±18 mA
±5 mA
35 mA
See (4)
150°C
1000V
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications and test
conditions, see the Electrical Characteristics. The ensured specifications apply only for the test conditions listed.
(2) Do not connect output to V+ when V+ is greater than 13V or reliability may be adversely affected.
(3) Applies to both single supply and split supply operation. Continuous short circuit operation at elevated ambient temperature and/or
multiple Op Amp shorts can result in exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of ±30
mA over long term may adversely affect reliability.
(4) The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient
temperature is PD = (TJ(MAX) TA)/θJA.
(5) Human Body Model is 1.5 kΩ in series with 100 pF.
Operating Ratings
Temperature Range
LMC660AI
LMC660C
Supply Voltage Range
Power Dissipation
Thermal Resistance (θJA)(2)
14-Pin SOIC
14-Pin PDIP
40°C TJ +85°C
0°C TJ +70°C
4.75V to 15.5V
See (1)
115°C/W
85°C/W
(1) For operating at elevated temperatures the device must be derated based on the thermal resistance θJA with PD = (TJ TA)/θJA.
(2) All numbers apply for packages soldered directly into a PC board.
2
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Copyright © 1998–2013, Texas Instruments Incorporated



Texas Instruments LMC660AIN
LMC660
www.ti.com
SNOSBZ3D – APRIL 1998 – REVISED MARCH 2013
DC Electrical Characteristics
Unless otherwise specified, all limits ensured for TJ = 25°C. Boldface limits apply at the temperature extremes. V+ = 5V, V=
0V, VCM = 1.5V, VO = 2.5V and RL > 1Munless otherwise specified.
Parameter
Test Conditions
Typ (1)
LMC660AI
Limit (1)
LMC660C
Limit (1)
Units
Input Offset Voltage
1
3
6
mV
3.3
6.3
max
Input Offset Voltage Average Drift
1.3
μV/°C
Input Bias Current
Input Offset Current
Input Resistance
Common Mode
Rejection Ratio
Positive Power Supply
Rejection Ratio
Negative Power Supply
Rejection Ratio
Input Common-Mode
Voltage Range
Large Signal
Voltage Gain
Output Swing
0V VCM 12.0V
V+ = 15V
5V V+ 15V
VO = 2.5V
0V V≤ −10V
V+ = 5V & 15V
For CMRR 50 dB
RL = 2 kΩ (2)
Sourcing
Sinking
RL = 600Ω (2)
Sourcing
Sinking
V+ = 5V
RL = 2 kΩ to V+/2
V+ = 5V
RL = 600Ω to V+/2
V+ = 15V
RL = 2 kΩ to V+/2
V+ = 15V
RL = 600Ω to V+/2
0.002
0.001
>1
83
83
94
0.4
V+ 1.9
2000
500
1000
250
4.87
0.10
4.61
0.30
14.63
0.26
13.90
0.79
4
2
70
68
70
68
84
83
0.1
0
V+ 2.3
V+ 2.5
440
400
180
120
220
200
100
60
4.82
4.79
0.15
0.17
4.41
4.31
0.50
0.56
14.50
14.44
0.35
0.40
13.35
13.15
1.16
1.32
2
1
63
62
63
62
74
73
0.1
0
V+ 2.3
V+ 2.4
300
200
90
80
150
100
50
40
4.78
4.76
0.19
0.21
4.27
4.21
0.63
0.69
14.37
14.32
0.44
0.48
12.92
12.76
1.45
1.58
pA
max
pA
max
TeraΩ
dB
min
dB
min
dB
min
V
max
V
min
V/mV
min
V/mV
min
V/mV
min
V/mV
min
V
min
V
max
V
min
V
max
V
min
V
max
V
min
V
max
(1) Typical values represent the most likely parametric norm. Limits are specified by testing or correlation.
(2) V+ = 15V, VCM = 7.5V and RL connected to 7.5V. For Sourcing tests, 7.5V VO 11.5V. For Sinking tests, 2.5V VO 7.5V.
Copyright © 1998–2013, Texas Instruments Incorporated
Product Folder Links: LMC660
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