TRIPLE 3-INPUT POSITIVE-NAND GATE
D 4.5-V to 5.5-V VCC Operation D Inputs Accept Voltages to 5.5 V
SN54ACT10 . . . J OR W PACKAGE SN74ACT10 . . . D, DB, ...
Description
D 4.5-V to 5.5-V VCC Operation D Inputs Accept Voltages to 5.5 V
SN54ACT10 . . . J OR W PACKAGE SN74ACT10 . . . D, DB, N, NS, OR PW PACKAGE
(TOP VIEW)
1A 1 1B 2 2A 3 2B 4 2C 5 2Y 6 GND 7
14 VCC 13 1C 12 1Y 11 3A 10 3B 9 3C 8 3Y
SN54ACT10, SN74ACT10 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES
SCAS526C − AUGUST 1995 − REVISED OCTOBER 2003
D Max tpd of 9.5 ns at 5 V D Inputs Are TTL-Voltage Compatible
SN54ACT10 . . . FK PACKAGE (TOP VIEW)
1C
VCC
NC
1A
1B
2A
3 2 1 20 19
4
18
1Y
NC 5
17 NC
2B 6
16 3A
NC 7
15 NC
2C 8
14 3B
9 10 11 12 13
3C
3Y
NC
GND
2Y
description/ordering information
NC − No internal connection
The ’ACT10 devices contain three independent 3-input NAND gates. The devices perform the Boolean functions Y = A B C or Y = A + B + C in positive logic.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE PART NUMBER
TOP-SIDE MARKING
PDIP − N
Tube
SN74ACT10N
SN74ACT10N
SOIC − D
Tube Tape and reel
SN74ACT10D SN74ACT10DR
ACT10
−40°C to 85°C SOP − NS
Tape and reel SN74ACT10NSR
ACT10
SSOP − DB
Tape and reel SN74ACT10DBR
AD10
TSSOP − PW
Tube Tape and reel
SN74ACT10PW SN74ACT10PWR
AD10
CDIP − J
Tube
SNJ54ACT10J
SNJ54ACT10J
−55°C to 125°C CFP − W
Tube
SNJ54ACT10W
SNJ54ACT10W
LCCC − FK
Tube
SNJ54ACT10FK
SNJ54ACT10FK
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
FUNCTION TABLE (each gate)
INPUTS
A
B
C
H
H
H
L
X
X
X
L
X
...
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