POSITIVE-NAND GATE. SN74ACT10PW Datasheet

SN74ACT10PW GATE. Datasheet pdf. Equivalent

SN74ACT10PW Datasheet
Recommendation SN74ACT10PW Datasheet
Part SN74ACT10PW
Description TRIPLE 3-INPUT POSITIVE-NAND GATE
Feature SN74ACT10PW; D 4.5-V to 5.5-V VCC Operation D Inputs Accept Voltages to 5.5 V SN54ACT10 . . . J OR W PACKAGE SN7.
Manufacture etcTI
Datasheet
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Texas Instruments SN74ACT10PW
D 4.5-V to 5.5-V VCC Operation
D Inputs Accept Voltages to 5.5 V
SN54ACT10 . . . J OR W PACKAGE
SN74ACT10 . . . D, DB, N, NS, OR PW PACKAGE
(TOP VIEW)
1A 1
1B 2
2A 3
2B 4
2C 5
2Y 6
GND 7
14 VCC
13 1C
12 1Y
11 3A
10 3B
9 3C
8 3Y
SN54ACT10, SN74ACT10
TRIPLE 3ĆINPUT POSITIVEĆNAND GATES
SCAS526C − AUGUST 1995 − REVISED OCTOBER 2003
D Max tpd of 9.5 ns at 5 V
D Inputs Are TTL-Voltage Compatible
SN54ACT10 . . . FK PACKAGE
(TOP VIEW)
2A
3 2 1 20 19
4
18
1Y
NC 5
17 NC
2B 6
16 3A
NC 7
15 NC
2C 8
14 3B
9 10 11 12 13
description/ordering information
NC − No internal connection
The ’ACT10 devices contain three independent 3-input NAND gates. The devices perform the Boolean
functions Y = A B C or Y = A + B + C in positive logic.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP − N
Tube
SN74ACT10N
SN74ACT10N
SOIC − D
Tube
Tape and reel
SN74ACT10D
SN74ACT10DR
ACT10
−40°C to 85°C SOP − NS
Tape and reel SN74ACT10NSR
ACT10
SSOP − DB
Tape and reel SN74ACT10DBR
AD10
TSSOP − PW
Tube
Tape and reel
SN74ACT10PW
SN74ACT10PWR
AD10
CDIP − J
Tube
SNJ54ACT10J
SNJ54ACT10J
−55°C to 125°C CFP − W
Tube
SNJ54ACT10W
SNJ54ACT10W
LCCC − FK
Tube
SNJ54ACT10FK
SNJ54ACT10FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
(each gate)
INPUTS
A
B
C
H
H
H
L
X
X
X
L
X
OUTPUT
Y
L
H
H
X
X
L
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 2003, Texas Instruments Incorporated
On products compliant to MILĆPRFĆ38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
1



Texas Instruments SN74ACT10PW
SN54ACT10, SN74ACT10
TRIPLE 3ĆINPUT POSITIVEĆNAND GATES
SCAS526C − AUGUST 1995 − REVISED OCTOBER 2003
logic diagram, each gate (positive logic)
1A 1
1B 2
1C 13
2A 3
2B 4
2C 5
3A 11
3B 10
3C 9
Pin numbers shown are for the D, DB, J, N, NS, PW, and W packages.
12 1Y
6
2Y
8 3Y
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±200 mA
Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
SN54ACT10 SN74ACT10
UNIT
MIN MAX MIN MAX
VCC
VIH
VIL
VI
VO
IOH
IOL
t/v
Supply voltage
High-level input voltage
Low-level input voltage
Input voltage
Output voltage
High-level output current
Low-level output current
Input transition rise or fall rate
4.5 5.5
2
0.8
0 VCC
0 VCC
−24
24
8
4.5 5.5 V
2
V
0.8 V
0 VCC V
0 VCC V
−24 mA
24 mA
8 ns/V
TA
Operating free-air temperature
−55 125 −40
85 °C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265



Texas Instruments SN74ACT10PW
SN54ACT10, SN74ACT10
TRIPLE 3ĆINPUT POSITIVEĆNAND GATES
SCAS526C − AUGUST 1995 − REVISED OCTOBER 2003
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
TA = 25°C
SN54ACT10 SN74ACT10
MIN TYP MAX MIN MAX MIN MAX
IOH = −50 µA
4.5 V
4.4 4.49
4.4
4.4
5.5 V
5.4 5.49
5.4
5.4
VOH
IOH = −24 mA
IOH = −50 mA†
IOH = −75 mA†
IOL = 50 µA
4.5 V 3.86
3.7
3.76
5.5 V 4.86
4.7
4.76
5.5 V
3.85
5.5 V
3.85
4.5 V
0.001 0.1
0.1
0.1
5.5 V
0.001 0.1
0.1
0.1
VOL
IOL = 24 mA
4.5 V
5.5 V
0.36
0.5
0.44
0.36
0.5
0.44
IOL = 50 mA†
IOL = 75 mA†
5.5 V
5.5 V
1.65
1.65
II
VI = VCC or GND
5.5 V
±0.1
±1
±1
ICC
VI = VCC or GND,
IO = 0
5.5 V
4
80
40
ICC‡
One input at 3.4 V,
Other inputs at GND or VCC
5.5 V
0.6
1.6
1.5
Ci
VI = VCC or GND
5V
2.6
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
This is the increase in supply current for each input that is at one of the specified TTL voltage levels, rather than 0 V or VCC.
UNIT
V
V
µA
µA
mA
pF
switching characteristics over recommended operating free-air temperature range,
VCC = 5 V " 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
TA = 25°C
SN54ACT10 SN74ACT10
UNIT
MIN TYP MAX MIN MAX MIN MAX
tPLH
Any
tPHL
1 6.5
9
1
10
1
10
Y
ns
1 6.5
9
1 9.5
1 9.5
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER
Cpd Power dissipation capacitance
TEST CONDITIONS
CL = 50 pF,
f = 1 MHz
TYP UNIT
25
pF
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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