I/O Controller. MCS9900 Datasheet

MCS9900 Controller. Datasheet pdf. Equivalent

MCS9900 Datasheet
Recommendation MCS9900 Datasheet
Part MCS9900
Description PCIe to Multi I/O Controller
Feature MCS9900; MCS9900 PCIe to Multi I/O (4S, 2S+1P) Controller MCS9900 PCIe to Multi I/O (4S, 2S+1P) Controller Da.
Manufacture ASIX
Datasheet
Download MCS9900 Datasheet





ASIX MCS9900
MCS9900
PCIe to Multi I/O (4S, 2S+1P) Controller
MCS9900
PCIe to Multi I/O (4S, 2S+1P) Controller
Datasheet
Revision 2.00
Aug. 5th, 2011
1
Copyright © 2009-2011 ASIX Electronics Corporation. All rights reserved.



ASIX MCS9900
MCS9900
PCIe to Multi I/O (4S, 2S+1P) Controller
IMPORTANT NOTICE
Copyright © 2009-2011 ASIX Electronics Corporation. All rights reserved.
DISCLAIMER
No part of this document may be reproduced or transmitted in any form or by any means, electronic or mechanical,
including photocopying and recording, for any purpose, without the express written permission of ASIX. ASIX may
make changes to the product specifications and descriptions in this document at any time, without notice.
ASIX provides this document “as is” without warranty of any kind, either expressed or implied, including without
limitation warranties of merchantability, fitness for a particular purpose, and non-infringement.
Designers must not rely on the absence or characteristics of any features or registers marked “reserved”, “undefined” or
“NC”. ASIX reserves these for future definition and shall have no responsibility whatsoever for conflicts or
incompatibilities arising from future changes to them. Always contact ASIX to get the latest document before starting a
design of ASIX products.
TRADEMARKS
ASIX, the ASIX logo are registered trademarks of ASIX Electronics Corporation. All other trademarks are the property
of their respective owners.
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Copyright © 2009-2011 ASIX Electronics Corporation. All rights reserved.



ASIX MCS9900
MCS9900
PCIe to Multi I/O (4S, 2S+1P) Controller
Table of Contents
1 Introduction ............................................................................................................................... 4
1.1 Block Diagram ............................................................................................................................... 4
1.2 Features ........................................................................................................................................ 5
1.3 Applications .................................................................................................................................. 6
1.4 Ordering information.................................................................................................................... 6
1.5 Support ......................................................................................................................................... 6
1.6 Package options............................................................................................................................ 7
2 Pin Diagram MCS9900CVAA...................................................................................................8
3 Pin Description........................................................................................................................... 9
3.1 Pin configuration of MCS9900CVAA............................................................................................ 9
4 Detailed Pin Definitions ........................................................................................................... 11
4.1 PCI Express Interface Signals ...................................................................................................... 11
4.2 Serial Port Interface Signals ........................................................................................................ 12
4.3 Parallel port Interface signals ..................................................................................................... 14
4.4 Cascade Interface Signals ........................................................................................................... 16
4.5 I2C Interface Signals .................................................................................................................... 18
4.6 GPIO Interface Signals ................................................................................................................ 18
4.7 Clock/Crystal Oscillator Interface Signals ................................................................................... 18
4.8 Mode Select Signals .................................................................................................................... 18
4.9 Test Mode Signals....................................................................................................................... 19
4.10 JTAG Interface Signals................................................................................................................. 19
4.11 Power Supply Signals .................................................................................................................. 19
5 Mode Selection and Function Mapping .................................................................................. 22
6 Functional Description.............................................................................................................23
6.1 PCIe Operation............................................................................................................................ 23
6.2 PCIe Configuration Space ........................................................................................................... 25
6.3 Serial Port ................................................................................................................................... 29
6.4 Parallel Port ................................................................................................................................ 30
6.5 I2C................................................................................................................................................ 33
6.6 PM Control.................................................................................................................................. 34
6.7 Cascade Interface ....................................................................................................................... 35
6.8 Clocks and Resets ....................................................................................................................... 37
6.9 GPIO............................................................................................................................................ 38
7 EEPROM Contents Layout........................................................................................................39
8 Electrical Specifications ........................................................................................................... 42
9 Mechanical Dimensions...........................................................................................................44
Revision History ............................................................................................................................. 45
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Copyright © 2009-2011 ASIX Electronics Corporation. All rights reserved.





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